d157e19562
When passing a type with large alignment byval, we were specifying the type's alignment rather than the alignment that the backend is actually capable of producing (ABIAlign). This would be OK (if odd) assuming the backend dealt with it prooperly, unfortunately it doesn't and trying to pass types with "byval align 16" can cause it to set fp incorrectly and trash the stack during the prologue. I'll be fixing that in a separate patch, but Clang should still be emitting IR that's as close to its intent as possible. rdar://20059039 llvm-svn: 231706
221 lines
7.1 KiB
C
221 lines
7.1 KiB
C
// REQUIRES: arm-registered-target
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// RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=APCS-GNU %s
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// RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=AAPCS %s
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// APCS-GNU-LABEL: define signext i8 @f0()
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// AAPCS-LABEL: define arm_aapcscc signext i8 @f0()
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char f0(void) {
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return 0;
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}
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// APCS-GNU-LABEL: define i8 @f1()
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// AAPCS-LABEL: define arm_aapcscc i8 @f1()
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struct s1 { char f0; };
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struct s1 f1(void) {}
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// APCS-GNU-LABEL: define i16 @f2()
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// AAPCS-LABEL: define arm_aapcscc i16 @f2()
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struct s2 { short f0; };
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struct s2 f2(void) {}
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// APCS-GNU-LABEL: define i32 @f3()
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// AAPCS-LABEL: define arm_aapcscc i32 @f3()
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struct s3 { int f0; };
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struct s3 f3(void) {}
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// APCS-GNU-LABEL: define i32 @f4()
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// AAPCS-LABEL: define arm_aapcscc i32 @f4()
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struct s4 { struct s4_0 { int f0; } f0; };
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struct s4 f4(void) {}
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// APCS-GNU-LABEL: define void @f5(
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// APCS-GNU: struct.s5* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f5()
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struct s5 { struct { } f0; int f1; };
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struct s5 f5(void) {}
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// APCS-GNU-LABEL: define void @f6(
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// APCS-GNU: struct.s6* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f6()
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struct s6 { int f0[1]; };
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struct s6 f6(void) {}
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// APCS-GNU-LABEL: define void @f7()
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// AAPCS-LABEL: define arm_aapcscc void @f7()
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struct s7 { struct { int : 0; } f0; };
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struct s7 f7(void) {}
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// APCS-GNU-LABEL: define void @f8(
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// APCS-GNU: struct.s8* noalias sret
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// AAPCS-LABEL: define arm_aapcscc void @f8()
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struct s8 { struct { int : 0; } f0[1]; };
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struct s8 f8(void) {}
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// APCS-GNU-LABEL: define i32 @f9()
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// AAPCS-LABEL: define arm_aapcscc i32 @f9()
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struct s9 { int f0; int : 0; };
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struct s9 f9(void) {}
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// APCS-GNU-LABEL: define i32 @f10()
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// AAPCS-LABEL: define arm_aapcscc i32 @f10()
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struct s10 { int f0; int : 0; int : 0; };
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struct s10 f10(void) {}
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// APCS-GNU-LABEL: define void @f11(
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// APCS-GNU: struct.s11* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f11()
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struct s11 { int : 0; int f0; };
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struct s11 f11(void) {}
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// APCS-GNU-LABEL: define i32 @f12()
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// AAPCS-LABEL: define arm_aapcscc i32 @f12()
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union u12 { char f0; short f1; int f2; };
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union u12 f12(void) {}
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// APCS-GNU-LABEL: define void @f13(
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// APCS-GNU: struct.s13* noalias sret
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// FIXME: This should return a float.
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// AAPCS-FIXME: darm_aapcscc efine float @f13()
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struct s13 { float f0; };
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struct s13 f13(void) {}
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// APCS-GNU-LABEL: define void @f14(
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// APCS-GNU: union.u14* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f14()
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union u14 { float f0; };
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union u14 f14(void) {}
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// APCS-GNU-LABEL: define void @f15()
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// AAPCS-LABEL: define arm_aapcscc void @f15()
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void f15(struct s7 a0) {}
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// APCS-GNU-LABEL: define void @f16()
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// AAPCS-LABEL: define arm_aapcscc void @f16()
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void f16(struct s8 a0) {}
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// APCS-GNU-LABEL: define i32 @f17()
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// AAPCS-LABEL: define arm_aapcscc i32 @f17()
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struct s17 { short f0 : 13; char f1 : 4; };
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struct s17 f17(void) {}
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// APCS-GNU-LABEL: define i32 @f18()
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// AAPCS-LABEL: define arm_aapcscc i32 @f18()
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struct s18 { short f0; char f1 : 4; };
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struct s18 f18(void) {}
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// APCS-GNU-LABEL: define void @f19(
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// APCS-GNU: struct.s19* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f19()
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struct s19 { int f0; struct s8 f1; };
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struct s19 f19(void) {}
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// APCS-GNU-LABEL: define void @f20(
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// APCS-GNU: struct.s20* noalias sret
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// AAPCS-LABEL: define arm_aapcscc i32 @f20()
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struct s20 { struct s8 f1; int f0; };
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struct s20 f20(void) {}
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// APCS-GNU-LABEL: define i8 @f21()
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// AAPCS-LABEL: define arm_aapcscc i32 @f21()
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struct s21 { struct {} f1; int f0 : 4; };
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struct s21 f21(void) {}
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// APCS-GNU-LABEL: define i16 @f22()
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// APCS-GNU-LABEL: define i32 @f23()
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// APCS-GNU-LABEL: define i64 @f24()
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// APCS-GNU-LABEL: define i128 @f25()
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// APCS-GNU-LABEL: define i64 @f26()
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// APCS-GNU-LABEL: define i128 @f27()
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// AAPCS-LABEL: define arm_aapcscc i16 @f22()
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// AAPCS-LABEL: define arm_aapcscc i32 @f23()
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// AAPCS: define arm_aapcscc void @f24({{.*}} noalias sret
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// AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret
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// AAPCS: define arm_aapcscc void @f26({{.*}} noalias sret
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// AAPCS: define arm_aapcscc void @f27({{.*}} noalias sret
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_Complex char f22(void) {}
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_Complex short f23(void) {}
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_Complex int f24(void) {}
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_Complex long long f25(void) {}
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_Complex float f26(void) {}
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_Complex double f27(void) {}
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// APCS-GNU-LABEL: define i16 @f28()
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// AAPCS-LABEL: define arm_aapcscc i16 @f28()
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struct s28 { _Complex char f0; };
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struct s28 f28() {}
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// APCS-GNU-LABEL: define i32 @f29()
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// AAPCS-LABEL: define arm_aapcscc i32 @f29()
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struct s29 { _Complex short f0; };
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struct s29 f29() {}
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// APCS-GNU: define void @f30({{.*}} noalias sret
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// AAPCS: define arm_aapcscc void @f30({{.*}} noalias sret
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struct s30 { _Complex int f0; };
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struct s30 f30() {}
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// PR11905
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struct s31 { char x; };
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void f31(struct s31 s) { }
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// AAPCS: @f31([1 x i32] %s.coerce)
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// AAPCS: %s = alloca %struct.s31, align 4
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// AAPCS: alloca [1 x i32]
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// AAPCS: store [1 x i32] %s.coerce, [1 x i32]*
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// APCS-GNU: @f31([1 x i32] %s.coerce)
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// APCS-GNU: %s = alloca %struct.s31, align 4
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// APCS-GNU: alloca [1 x i32]
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// APCS-GNU: store [1 x i32] %s.coerce, [1 x i32]*
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// PR13562
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struct s32 { double x; };
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void f32(struct s32 s) { }
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// AAPCS: @f32([1 x i64] %s.coerce)
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// APCS-GNU: @f32([2 x i32] %s.coerce)
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// PR13350
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struct s33 { char buf[32*32]; };
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void f33(struct s33 s) { }
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// APCS-GNU-LABEL: define void @f33(%struct.s33* byval align 4 %s)
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// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* byval align 4 %s)
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// PR14048
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struct s34 { char c; };
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void f34(struct s34 s);
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void g34(struct s34 *s) { f34(*s); }
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// AAPCS: @g34(%struct.s34* %s)
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// AAPCS: %[[a:.*]] = alloca [1 x i32]
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// AAPCS: load [1 x i32], [1 x i32]* %[[a]]
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// rdar://12596507
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struct s35
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{
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float v[18]; //make sure byval is on.
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} __attribute__((aligned(16)));
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typedef struct s35 s35_with_align;
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typedef __attribute__((neon_vector_type(4))) float float32x4_t;
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static __attribute__((__always_inline__, __nodebug__)) float32x4_t vaddq_f32(
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float32x4_t __a, float32x4_t __b) {
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return __a + __b;
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}
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float32x4_t f35(int i, s35_with_align s1, s35_with_align s2) {
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float32x4_t v = vaddq_f32(*(float32x4_t *)&s1,
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*(float32x4_t *)&s2);
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return v;
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}
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// APCS-GNU-LABEL: define <4 x float> @f35(i32 %i, %struct.s35* byval align 4, %struct.s35* byval align 4)
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// APCS-GNU: %[[a:.*]] = alloca %struct.s35, align 16
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// APCS-GNU: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8*
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// APCS-GNU: %[[c:.*]] = bitcast %struct.s35* %0 to i8*
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// APCS-GNU: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %[[b]], i8* %[[c]]
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// APCS-GNU: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
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// APCS-GNU: load <4 x float>, <4 x float>* %[[d]], align 16
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// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval align 8, %struct.s35* byval align 8)
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// AAPCS: %[[a:.*]] = alloca %struct.s35, align 16
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// AAPCS: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8*
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// AAPCS: %[[c:.*]] = bitcast %struct.s35* %0 to i8*
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// AAPCS: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %[[b]], i8* %[[c]]
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// AAPCS: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
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// AAPCS: load <4 x float>, <4 x float>* %[[d]], align 16
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