When hosting a loop invariant instruction the resulting register must be live in all the basic blocks of the loop body and the killed flags of the register must be cleared. Before this patch killed flags of subregister to a hoisted superregister was not cleared in the loop body. This was found in an out of tree target, but the testcase mlicm-stack-write-check.mir was modified to trigger the case.
66 lines
1.5 KiB
YAML
66 lines
1.5 KiB
YAML
# RUN: llc -mtriple=aarch64 -run-pass machinelicm -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: test
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr64 }
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stack:
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- { id: 0, size: 8, type: spill-slot }
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body: |
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bb.0:
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; CHECK-LABEL: name: test
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; CHECK-LABEL: bb.0:
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; CHECK: $x2 = LDRXui %stack.0, 0
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liveins: $x0, $x1, $x2
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B %bb.1
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bb.1:
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; CHECK-LABEL: bb.1:
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; CHECK-NOT: $x2 = LDRXui %stack.0, 0
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; CHECK: $x0 = ADDXrr $x0, $x2
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liveins: $x0
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DBG_VALUE %stack.0, 0
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$x2 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
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$x0 = ADDXrr $x0, killed $x2
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$xzr = SUBSXri killed $x0, 1, 0, implicit-def $nzcv
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Bcc 11, %bb.1, implicit $nzcv
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B %bb.2
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bb.2:
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liveins: $x0
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%0 = COPY $x0
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%0 = COPY $x0 ; Force isSSA = false.
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...
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---
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name: test2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr64 }
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stack:
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- { id: 0, size: 8, type: spill-slot }
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body: |
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bb.0:
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; CHECK-LABEL: name: test2
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; CHECK-LABEL: bb.0:
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; CHECK: $x2 = LDRXui %stack.0, 0
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liveins: $x0, $x1, $x2
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B %bb.1
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bb.1:
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; CHECK-LABEL: bb.1:
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; CHECK-NOT: $x2 = LDRXui %stack.0, 0
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; CHECK: $w0 = ADDWrr $w0, $w2
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liveins: $x0
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DBG_VALUE %stack.0, 0
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$x2 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
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$w0 = ADDWrr $w0, killed $w2
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$wzr = SUBSWri killed $w0, 1, 0, implicit-def $nzcv
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Bcc 11, %bb.1, implicit $nzcv
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B %bb.2
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bb.2:
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liveins: $x0
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%0 = COPY $x0
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%0 = COPY $x0 ; Force isSSA = false.
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...
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