9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
85 lines
3.9 KiB
LLVM
85 lines
3.9 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W32 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -verify-machineinstrs -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,W32 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,W64 %s
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; RUN: opt -O3 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -O3 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize32 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -passes='default<O3>' -mattr=+wavefrontsize32 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -O3 -mattr=+wavefrontsize64 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=tonga -O3 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1010 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1100 -O3 -mattr=+wavefrontsize32,-wavefrontsize64 -S < %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -mcpu=gfx1100 -O3 -mattr=-wavefrontsize32,+wavefrontsize64 -S < %s | FileCheck -check-prefix=OPT %s
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; GCN-LABEL: {{^}}fold_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_wavefrontsize(
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; W32: v_mov_b32_e32 [[V:v[0-9]+]], 32
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; W64: v_mov_b32_e32 [[V:v[0-9]+]], 64
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; GCN: store_{{dword|b32}} v{{.+}}, [[V]]
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; OPT: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT: store i32 %tmp, ptr addrspace(1) %arg, align 4
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_wavefrontsize(ptr addrspace(1) nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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store i32 %tmp, ptr addrspace(1) %arg, align 4
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ret void
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}
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; GCN-LABEL: {{^}}fold_and_optimize_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_and_optimize_wavefrontsize(
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; W32: v_mov_b32_e32 [[V:v[0-9]+]], 1{{$}}
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; W64: v_mov_b32_e32 [[V:v[0-9]+]], 2{{$}}
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; GCN-NOT: cndmask
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; GCN: store_{{dword|b32}} v{{.+}}, [[V]]
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; OPT: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT: %tmp1 = icmp ugt i32 %tmp, 32
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; OPT: %tmp2 = select i1 %tmp1, i32 2, i32 1
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; OPT: store i32 %tmp2, ptr addrspace(1) %arg
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_and_optimize_wavefrontsize(ptr addrspace(1) nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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%tmp1 = icmp ugt i32 %tmp, 32
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%tmp2 = select i1 %tmp1, i32 2, i32 1
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store i32 %tmp2, ptr addrspace(1) %arg
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ret void
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}
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; GCN-LABEL: {{^}}fold_and_optimize_if_wavefrontsize:
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; OPT-LABEL: define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(
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; OPT: bb:
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; OPT: %tmp = tail call i32 @llvm.amdgcn.wavefrontsize()
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; OPT: %tmp1 = icmp ugt i32 %tmp, 32
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; OPT: bb3:
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; OPT-NEXT: ret void
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define amdgpu_kernel void @fold_and_optimize_if_wavefrontsize(ptr addrspace(1) nocapture %arg) {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.wavefrontsize() #0
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%tmp1 = icmp ugt i32 %tmp, 32
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br i1 %tmp1, label %bb2, label %bb3
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bb2: ; preds = %bb
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store i32 1, ptr addrspace(1) %arg, align 4
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br label %bb3
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bb3: ; preds = %bb2, %bb
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ret void
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}
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declare i32 @llvm.amdgcn.wavefrontsize() #0
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attributes #0 = { nounwind readnone speculatable }
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