9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
153 lines
5.9 KiB
LLVM
153 lines
5.9 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=EG,FUNC %s
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declare i32 @llvm.r600.read.tidig.x() readnone
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; FUNC-LABEL: {{^}}s_sub_i32:
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define amdgpu_kernel void @s_sub_i32(ptr addrspace(1) %out, i32 %a, i32 %b) {
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%result = sub i32 %a, %b
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_sub_imm_i32:
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define amdgpu_kernel void @s_sub_imm_i32(ptr addrspace(1) %out, i32 %a) {
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%result = sub i32 1234, %a
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_i32:
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define amdgpu_kernel void @test_sub_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1
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%a = load i32, ptr addrspace(1) %in
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%b = load i32, ptr addrspace(1) %b_ptr
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%result = sub i32 %a, %b
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_imm_i32:
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; EG: SUB_INT
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define amdgpu_kernel void @test_sub_imm_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%a = load i32, ptr addrspace(1) %in
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%result = sub i32 123, %a
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_v2i32:
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define amdgpu_kernel void @test_sub_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%b_ptr = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 1
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%a = load <2 x i32>, ptr addrspace(1) %in
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%b = load <2 x i32>, ptr addrspace(1) %b_ptr
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%result = sub <2 x i32> %a, %b
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store <2 x i32> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_v4i32:
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define amdgpu_kernel void @test_sub_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%b_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 1
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%a = load <4 x i32>, ptr addrspace(1) %in
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%b = load <4 x i32>, ptr addrspace(1) %b_ptr
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%result = sub <4 x i32> %a, %b
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store <4 x i32> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_i16:
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define amdgpu_kernel void @test_sub_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep = getelementptr i16, ptr addrspace(1) %in, i32 %tid
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%b_ptr = getelementptr i16, ptr addrspace(1) %gep, i32 1
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%a = load volatile i16, ptr addrspace(1) %gep
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%b = load volatile i16, ptr addrspace(1) %b_ptr
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%result = sub i16 %a, %b
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_v2i16:
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define amdgpu_kernel void @test_sub_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep = getelementptr <2 x i16>, ptr addrspace(1) %in, i32 %tid
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%b_ptr = getelementptr <2 x i16>, ptr addrspace(1) %gep, i16 1
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%a = load <2 x i16>, ptr addrspace(1) %gep
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%b = load <2 x i16>, ptr addrspace(1) %b_ptr
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%result = sub <2 x i16> %a, %b
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store <2 x i16> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}test_sub_v4i16:
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define amdgpu_kernel void @test_sub_v4i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep = getelementptr <4 x i16>, ptr addrspace(1) %in, i32 %tid
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%b_ptr = getelementptr <4 x i16>, ptr addrspace(1) %gep, i16 1
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%a = load <4 x i16>, ptr addrspace(1) %gep
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%b = load <4 x i16>, ptr addrspace(1) %b_ptr
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%result = sub <4 x i16> %a, %b
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store <4 x i16> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_sub_i64:
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; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG-DAG: SUB_INT {{[* ]*}}
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; EG-DAG: SUBB_UINT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT {{[* ]*}}
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define amdgpu_kernel void @s_sub_i64(ptr addrspace(1) noalias %out, i64 %a, i64 %b) nounwind {
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%result = sub i64 %a, %b
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store i64 %result, ptr addrspace(1) %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}v_sub_i64:
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; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG-DAG: SUB_INT {{[* ]*}}
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; EG-DAG: SUBB_UINT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT {{[* ]*}}
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define amdgpu_kernel void @v_sub_i64(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %inA, ptr addrspace(1) noalias %inB) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x() readnone
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%a_ptr = getelementptr i64, ptr addrspace(1) %inA, i32 %tid
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%b_ptr = getelementptr i64, ptr addrspace(1) %inB, i32 %tid
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%a = load i64, ptr addrspace(1) %a_ptr
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%b = load i64, ptr addrspace(1) %b_ptr
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%result = sub i64 %a, %b
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store i64 %result, ptr addrspace(1) %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}v_test_sub_v2i64:
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define amdgpu_kernel void @v_test_sub_v2i64(ptr addrspace(1) %out, ptr addrspace(1) noalias %inA, ptr addrspace(1) noalias %inB) {
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%tid = call i32 @llvm.r600.read.tidig.x() readnone
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%a_ptr = getelementptr <2 x i64>, ptr addrspace(1) %inA, i32 %tid
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%b_ptr = getelementptr <2 x i64>, ptr addrspace(1) %inB, i32 %tid
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%a = load <2 x i64>, ptr addrspace(1) %a_ptr
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%b = load <2 x i64>, ptr addrspace(1) %b_ptr
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%result = sub <2 x i64> %a, %b
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store <2 x i64> %result, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_test_sub_v4i64:
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define amdgpu_kernel void @v_test_sub_v4i64(ptr addrspace(1) %out, ptr addrspace(1) noalias %inA, ptr addrspace(1) noalias %inB) {
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%tid = call i32 @llvm.r600.read.tidig.x() readnone
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%a_ptr = getelementptr <4 x i64>, ptr addrspace(1) %inA, i32 %tid
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%b_ptr = getelementptr <4 x i64>, ptr addrspace(1) %inB, i32 %tid
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%a = load <4 x i64>, ptr addrspace(1) %a_ptr
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%b = load <4 x i64>, ptr addrspace(1) %b_ptr
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%result = sub <4 x i64> %a, %b
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store <4 x i64> %result, ptr addrspace(1) %out
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ret void
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}
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