9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
39 lines
1.7 KiB
LLVM
39 lines
1.7 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s
|
|
|
|
; FIXME: This currently doesn't do a great job of clustering the
|
|
; loads, which end up with extra moves between them. Right now, it
|
|
; seems the only things areLoadsFromSameBasePtr is accomplishing is
|
|
; ordering the loads so that the lower address loads come first.
|
|
|
|
; FUNC-LABEL: {{^}}cluster_global_arg_loads:
|
|
; SI-DAG: buffer_load_dword [[REG0:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0{{$}}
|
|
; SI-DAG: buffer_load_dword [[REG1:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:8
|
|
; SI: buffer_store_dword [[REG0]]
|
|
; SI: buffer_store_dword [[REG1]]
|
|
define amdgpu_kernel void @cluster_global_arg_loads(ptr addrspace(1) %out0, ptr addrspace(1) %out1, ptr addrspace(1) %ptr) #0 {
|
|
%load0 = load i32, ptr addrspace(1) %ptr, align 4
|
|
%gep = getelementptr i32, ptr addrspace(1) %ptr, i32 2
|
|
%load1 = load i32, ptr addrspace(1) %gep, align 4
|
|
store i32 %load0, ptr addrspace(1) %out0, align 4
|
|
store i32 %load1, ptr addrspace(1) %out1, align 4
|
|
ret void
|
|
}
|
|
|
|
; Test for a crach in SIInstrInfo::areLoadsFromSameBasePtr() when checking
|
|
; an MUBUF load which does not have a vaddr operand.
|
|
; FUNC-LABEL: {{^}}same_base_ptr_crash:
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
define amdgpu_kernel void @same_base_ptr_crash(ptr addrspace(1) %out, ptr addrspace(1) %in, i32 %offset) {
|
|
entry:
|
|
%out1 = getelementptr i32, ptr addrspace(1) %out, i32 %offset
|
|
%tmp0 = load i32, ptr addrspace(1) %out
|
|
%tmp1 = load i32, ptr addrspace(1) %out1
|
|
%tmp2 = add i32 %tmp0, %tmp1
|
|
store i32 %tmp2, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nounwind readnone }
|