9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
16 lines
708 B
LLVM
16 lines
708 B
LLVM
; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s
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; XXX: Merge this test into vselect.ll once SI supports 64-bit select.
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; CHECK-LABEL: {{^}}test_select_v4i64:
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; Make sure the vectors aren't being stored on the stack. We know they are
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; being stored on the stack if the shaders uses at leat 10 registers.
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; CHECK-NOT: {{\**}} MOV T{{[0-9][0-9]}}.X
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define amdgpu_kernel void @test_select_v4i64(ptr addrspace(1) %out, <4 x i32> %c) {
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entry:
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%cmp = icmp ne <4 x i32> %c, <i32 0, i32 0, i32 0, i32 0>
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%result = select <4 x i1> %cmp, <4 x i64> <i64 0, i64 1, i64 2, i64 3>, <4 x i64> <i64 4, i64 5, i64 6, i64 7>
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store <4 x i64> %result, ptr addrspace(1) %out
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ret void
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}
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