8b8e1adbde
- Instead of lowering float/double ISD::ATOMIC_LOAD / ISD::ATOMIC_STORE nodes to regular LOAD/STORE nodes, make them legal and select those nodes properly instead. This avoids exposing them to the DAGCombiner. - AtomicExpand pass no longer casts float/double atomic load/stores to integer (FP128 is still casted).
32 lines
872 B
LLVM
32 lines
872 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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;
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; Test fpext of atomic loads to fp128 without VectorEnhancements1 (using FP register pairs).
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define fp128 @f1(ptr %src) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lxeb %f0, 0(%r3)
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; CHECK-NEXT: std %f0, 0(%r2)
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; CHECK-NEXT: std %f2, 8(%r2)
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; CHECK-NEXT: br %r14
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%V = load atomic float, ptr %src seq_cst, align 4
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%Res = fpext float %V to fp128
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ret fp128 %Res
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}
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define fp128 @f2(ptr %src) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lxdb %f0, 0(%r3)
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; CHECK-NEXT: std %f0, 0(%r2)
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; CHECK-NEXT: std %f2, 8(%r2)
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; CHECK-NEXT: br %r14
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%V = load atomic double, ptr %src seq_cst, align 8
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%Res = fpext double %V to fp128
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ret fp128 %Res
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}
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