a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
166 lines
4.6 KiB
LLVM
166 lines
4.6 KiB
LLVM
; Test 32-bit signed comparison in which the second operand is sign-extended
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; from an i16 memory value.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check the low end of the CH range.
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define void @f1(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f1:
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; CHECK: ch %r2, 0(%r3)
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; CHECK: br %r14
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%half = load i16, ptr %src
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the high end of the aligned CH range.
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define void @f2(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f2:
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; CHECK: ch %r2, 4094(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 2047
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the next halfword up, which should use CHY instead of CH.
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define void @f3(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f3:
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; CHECK: chy %r2, 4096(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 2048
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the high end of the aligned CHY range.
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define void @f4(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f4:
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; CHECK: chy %r2, 524286(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 262143
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the next halfword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f5(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f5:
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; CHECK: agfi %r3, 524288
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; CHECK: ch %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 262144
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the high end of the negative aligned CHY range.
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define void @f6(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f6:
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; CHECK: chy %r2, -2(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 -1
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the low end of the CHY range.
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define void @f7(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f7:
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; CHECK: chy %r2, -524288(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 -262144
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the next halfword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f8(i32 %lhs, ptr %src, ptr %dst) {
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; CHECK-LABEL: f8:
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; CHECK: agfi %r3, -524290
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; CHECK: ch %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i16, ptr %src, i64 -262145
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check that CH allows an index.
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define void @f9(i32 %lhs, i64 %base, i64 %index, ptr %dst) {
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; CHECK-LABEL: f9:
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; CHECK: ch %r2, 4094({{%r4,%r3|%r3,%r4}})
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 4094
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%ptr = inttoptr i64 %add2 to ptr
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check that CHY allows an index.
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define void @f10(i32 %lhs, i64 %base, i64 %index, ptr %dst) {
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; CHECK-LABEL: f10:
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; CHECK: chy %r2, 4096({{%r4,%r3|%r3,%r4}})
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 4096
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%ptr = inttoptr i64 %add2 to ptr
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%half = load i16, ptr %ptr
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%rhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, i32 100, i32 200
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store i32 %res, ptr %dst
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ret void
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}
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; Check the comparison can be reversed if that allows CH to be used.
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define double @f11(double %a, double %b, i32 %rhs, ptr %src) {
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; CHECK-LABEL: f11:
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; CHECK: ch %r2, 0(%r3)
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; CHECK-NEXT: bhr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%half = load i16, ptr %src
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%lhs = sext i16 %half to i32
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%cond = icmp slt i32 %lhs, %rhs
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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