9aa6f010a4
There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
114 lines
3.1 KiB
LLVM
114 lines
3.1 KiB
LLVM
; RUN: llc < %s -mtriple=thumb-apple-ios | FileCheck %s
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; RUN: llc < %s -mtriple=thumb-none-eabi | FileCheck %s
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; RUN: llc < %s -o %t -filetype=obj -mtriple=thumbv6-apple-ios
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; RUN: llvm-objdump -triple=thumbv6-apple-ios -d %t | FileCheck %s
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; RUN: llc < %s -o %t -filetype=obj -mtriple=thumbv6-none-eabi
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; RUN: llvm-objdump -triple=thumbv6-none-eabi -d %t | FileCheck %s
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; Largest stack for which a single tADDspi/tSUBspi is enough
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define void @test1() {
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; CHECK-LABEL: test1:
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; CHECK: sub sp, #508
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; CHECK: add sp, #508
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%tmp = alloca [ 508 x i8 ] , align 4
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ret void
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}
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; Largest stack for which three tADDspi/tSUBspis are enough
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define void @test100() {
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; CHECK-LABEL: test100:
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; CHECK: add sp, #508
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; CHECK: add sp, #508
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; CHECK: add sp, #508
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%tmp = alloca [ 1524 x i8 ] , align 4
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ret void
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}
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; Largest stack for which three tADDspi/tSUBspis are enough
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define void @test100_nofpelim() "no-frame-pointer-elim"="true" {
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; CHECK-LABEL: test100_nofpelim:
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; CHECK: subs r4, r7, #4
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; CHECK: mov sp, r4
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%tmp = alloca [ 1524 x i8 ] , align 4
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ret void
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}
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; Smallest stack for which we use a constant pool
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define void @test2() {
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; CHECK-LABEL: test2:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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%tmp = alloca [ 1528 x i8 ] , align 4
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ret void
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}
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; Smallest stack for which we use a constant pool
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define void @test2_nofpelim() "no-frame-pointer-elim"="true" {
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; CHECK-LABEL: test2_nofpelim:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; CHECK: subs r4, r7, #4
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; CHECK: mov sp, r4
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%tmp = alloca [ 1528 x i8 ] , align 4
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ret void
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}
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define i32 @test3() {
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; CHECK-LABEL: test3:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; CHECK: ldr [[TEMP]],
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; CHECK: add [[TEMP]], sp
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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%retval = alloca i32, align 4
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%tmp = alloca i32, align 4
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%a = alloca [805306369 x i8], align 16
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store i32 0, i32* %tmp
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%tmp1 = load i32, i32* %tmp
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ret i32 %tmp1
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}
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define i32 @test3_nofpelim() "no-frame-pointer-elim"="true" {
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; CHECK-LABEL: test3_nofpelim:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; CHECK: ldr [[TEMP]],
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; CHECK: add [[TEMP]], sp
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; CHECK: subs r4, r7,
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; CHECK: mov sp, r4
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%retval = alloca i32, align 4
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%tmp = alloca i32, align 4
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%a = alloca [805306369 x i8], align 16
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store i32 0, i32* %tmp
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%tmp1 = load i32, i32* %tmp
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ret i32 %tmp1
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}
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; Here, the adds get optimized out because they are dead, but the calculation
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; of the address of stack_a is dead but not optimized out. When the address
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; calculation gets expanded to two instructions, we need to avoid reading a
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; dead register.
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; No CHECK lines (just test for crashes), as we hope this will be optimised
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; better in future.
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define i32 @test4() {
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entry:
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%stack_a = alloca i8, align 1
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%stack_b = alloca [256 x i32*], align 4
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%int = ptrtoint i8* %stack_a to i32
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%add = add i32 %int, 1
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br label %block2
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block2:
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%add2 = add i32 %add, 1
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ret i32 0
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}
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