6bda14b313
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
119 lines
3.5 KiB
C++
119 lines
3.5 KiB
C++
//===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file defines the AVR specific subclass of TargetMachine.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "AVRTargetMachine.h"
|
|
|
|
#include "llvm/CodeGen/Passes.h"
|
|
#include "llvm/CodeGen/TargetPassConfig.h"
|
|
#include "llvm/IR/LegacyPassManager.h"
|
|
#include "llvm/IR/Module.h"
|
|
#include "llvm/Support/TargetRegistry.h"
|
|
|
|
#include "AVR.h"
|
|
#include "AVRTargetObjectFile.h"
|
|
#include "MCTargetDesc/AVRMCTargetDesc.h"
|
|
|
|
namespace llvm {
|
|
|
|
static const char *AVRDataLayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n8";
|
|
|
|
/// Processes a CPU name.
|
|
static StringRef getCPU(StringRef CPU) {
|
|
if (CPU.empty() || CPU == "generic") {
|
|
return "avr2";
|
|
}
|
|
|
|
return CPU;
|
|
}
|
|
|
|
static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
|
|
return RM.hasValue() ? *RM : Reloc::Static;
|
|
}
|
|
|
|
AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
|
|
StringRef CPU, StringRef FS,
|
|
const TargetOptions &Options,
|
|
Optional<Reloc::Model> RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL)
|
|
: LLVMTargetMachine(
|
|
T, AVRDataLayout, TT,
|
|
getCPU(CPU), FS, Options, getEffectiveRelocModel(RM), CM, OL),
|
|
SubTarget(TT, getCPU(CPU), FS, *this) {
|
|
this->TLOF = make_unique<AVRTargetObjectFile>();
|
|
initAsmInfo();
|
|
}
|
|
|
|
namespace {
|
|
/// AVR Code Generator Pass Configuration Options.
|
|
class AVRPassConfig : public TargetPassConfig {
|
|
public:
|
|
AVRPassConfig(AVRTargetMachine &TM, PassManagerBase &PM)
|
|
: TargetPassConfig(TM, PM) {}
|
|
|
|
AVRTargetMachine &getAVRTargetMachine() const {
|
|
return getTM<AVRTargetMachine>();
|
|
}
|
|
|
|
bool addInstSelector() override;
|
|
void addPreSched2() override;
|
|
void addPreRegAlloc() override;
|
|
};
|
|
} // namespace
|
|
|
|
TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
|
|
return new AVRPassConfig(*this, PM);
|
|
}
|
|
|
|
extern "C" void LLVMInitializeAVRTarget() {
|
|
// Register the target.
|
|
RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
|
|
|
|
auto &PR = *PassRegistry::getPassRegistry();
|
|
initializeAVRExpandPseudoPass(PR);
|
|
initializeAVRInstrumentFunctionsPass(PR);
|
|
initializeAVRRelaxMemPass(PR);
|
|
}
|
|
|
|
const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
|
|
return &SubTarget;
|
|
}
|
|
|
|
const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
|
|
return &SubTarget;
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Pass Pipeline Configuration
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
bool AVRPassConfig::addInstSelector() {
|
|
// Install an instruction selector.
|
|
addPass(createAVRISelDag(getAVRTargetMachine(), getOptLevel()));
|
|
// Create the frame analyzer pass used by the PEI pass.
|
|
addPass(createAVRFrameAnalyzerPass());
|
|
|
|
return false;
|
|
}
|
|
|
|
void AVRPassConfig::addPreRegAlloc() {
|
|
// Create the dynalloc SP save/restore pass to handle variable sized allocas.
|
|
addPass(createAVRDynAllocaSRPass());
|
|
}
|
|
|
|
void AVRPassConfig::addPreSched2() {
|
|
addPass(createAVRRelaxMemPass());
|
|
addPass(createAVRExpandPseudoPass());
|
|
}
|
|
|
|
} // end of namespace llvm
|