Hans Wennborg ca69fc1cb7 Revert r304824 "Fix PR23384 (part 3 of 3)" ...

This seems to be interacting badly with ASan somehow, causing false reports of
heap-buffer overflows: PR33514.

> Summary:
> The patch makes instruction count the highest priority for
> LSR solution for X86 (previously registers had highest priority).
>
> Reviewers: qcolombet
>
> Differential Revision: http://reviews.llvm.org/D30562
>
> From: Evgeny Stupachenko <evstupac@gmail.com>

llvm-svn: 305720

2017-06-19 17:57:15 +00:00

..

2008-08-14-ShadowIV.ll

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2009-11-10-LSRCrash.ll

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2011-07-20-DoubleIV.ll

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2011-11-29-postincphi.ll

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2011-12-04-loserreg.ll

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2012-01-13-phielim.ll

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bin_power.ll

[SCEV] Teach SCEVExpander to expand BinPow

2017-06-19 06:24:53 +00:00

canonical-2.ll

[LSR] Call canonicalize after we generate a new Formula in GenerateTruncates. Fix PR33077.

2017-05-18 17:21:22 +00:00

canonical.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

incorrect-offset-scaling.ll

Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"

2017-05-26 06:47:04 +00:00

ivchain-stress-X86.ll

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ivchain-X86.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

lit.local.cfg

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lsr-expand-quadratic.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

lsr-insns-1.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

lsr-insns-2.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

nested-loop.ll

Revert r304824 "Fix PR23384 (part 3 of 3)"

2017-06-19 17:57:15 +00:00

no_superflous_induction_vars.ll

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pr17473.ll

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pr28719.ll

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sibling-loops.ll

[LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loops

2017-02-16 21:27:31 +00:00