64b3bbae1e
The assembly should be generic, but at least currently R600 only supports 32-bit stores of [u]int1/4, and I believe that only global is well-supported. R600 lowers the 8/16 component stores to multiple 4-component stores. The unoptimized C versions of the other stuff is left in place. Patch by: Aaron Watry llvm-svn: 185009
51 lines
2.0 KiB
LLVM
51 lines
2.0 KiB
LLVM
; This provides optimized implementations of vstore4/8/16 for 32-bit int/uint
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define void @__clc_vstore2_impl_i32__global(<2 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
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%1 = ptrtoint i32 addrspace(1)* %addr to i32
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%2 = add i32 %1, %offset
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%3 = inttoptr i32 %2 to <2 x i32> addrspace(1)*
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store <2 x i32> %vec, <2 x i32> addrspace(1)* %3, align 4, !tbaa !3
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ret void
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}
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define void @__clc_vstore3_impl_i32__global(<3 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
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%1 = ptrtoint i32 addrspace(1)* %addr to i32
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%2 = add i32 %1, %offset
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%3 = inttoptr i32 %2 to <3 x i32> addrspace(1)*
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store <3 x i32> %vec, <3 x i32> addrspace(1)* %3, align 4, !tbaa !3
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ret void
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}
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define void @__clc_vstore4_impl_i32__global(<4 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
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%1 = ptrtoint i32 addrspace(1)* %addr to i32
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%2 = add i32 %1, %offset
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%3 = inttoptr i32 %2 to <4 x i32> addrspace(1)*
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store <4 x i32> %vec, <4 x i32> addrspace(1)* %3, align 4, !tbaa !3
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ret void
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}
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define void @__clc_vstore8_impl_i32__global(<8 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
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%1 = ptrtoint i32 addrspace(1)* %addr to i32
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%2 = add i32 %1, %offset
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%3 = inttoptr i32 %2 to <8 x i32> addrspace(1)*
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store <8 x i32> %vec, <8 x i32> addrspace(1)* %3, align 4, !tbaa !3
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ret void
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}
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define void @__clc_vstore16_impl_i32__global(<16 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind alwaysinline {
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%1 = ptrtoint i32 addrspace(1)* %addr to i32
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%2 = add i32 %1, %offset
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%3 = inttoptr i32 %2 to <16 x i32> addrspace(1)*
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store <16 x i32> %vec, <16 x i32> addrspace(1)* %3, align 4, !tbaa !3
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ret void
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}
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!1 = metadata !{metadata !"char", metadata !5}
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!2 = metadata !{metadata !"short", metadata !5}
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!3 = metadata !{metadata !"int", metadata !5}
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!4 = metadata !{metadata !"long", metadata !5}
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!5 = metadata !{metadata !"omnipotent char", metadata !6}
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!6 = metadata !{metadata !"Simple C/C++ TBAA"}
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