ab23dace56
Summary: This suppresses the generation of .Lcfi labels in our textual assembler. It was annoying that this generated cascading .Lcfi labels: llc foo.ll -o - | llvm-mc | llvm-mc After three trips through MCAsmStreamer, we'd have three labels in the output when none are necessary. We should only bother creating the labels and frame data when making a real object file. This supercedes D38605, which moved the entire .seh_ implementation into MCObjectStreamer. This has the advantage that we do more checking when emitting textual assembly, as a minor efficiency cost. Outputting textual assembly is not performance critical, so this shouldn't matter. Reviewers: majnemer, MatzeB Subscribers: qcolombet, nemanjai, javed.absar, eraman, hiraditya, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D38638 llvm-svn: 315259
119 lines
4.9 KiB
LLVM
119 lines
4.9 KiB
LLVM
; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST
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; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s
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; RUN: llvm-objdump -triple arm64-apple-darwin -d %t | FileCheck %s --check-prefix CHECK-ENCODING
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; CHECK-ENCODING-NOT: <unknown>
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; CHECK-ENCODING: mov x16, #281470681743360
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; CHECK-ENCODING: movk x16, #57005, lsl #16
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; CHECK-ENCODING: movk x16, #48879
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; One argument will be passed in register, the other will be pushed on the stack.
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; Return value in x0.
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define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen:
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; CHECK: str x{{.+}}, [sp]
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; CHECK-NEXT: mov x0, x{{.+}}
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; CHECK: Ltmp
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; CHECK-NEXT: mov x16, #281470681743360
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; CHECK: movk x16, #57005, lsl #16
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; CHECK: movk x16, #48879
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; CHECK-NEXT: blr x16
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; FAST-LABEL: jscall_patchpoint_codegen:
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; FAST: str x{{.+}}, [sp]
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; FAST: Ltmp
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; FAST-NEXT: mov x16, #281470681743360
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; FAST-NEXT: movk x16, #57005, lsl #16
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; FAST-NEXT: movk x16, #48879
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; FAST-NEXT: blr x16
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%resolveCall2 = inttoptr i64 281474417671919 to i8*
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%result = tail call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* %resolveCall2, i32 2, i64 %p4, i64 %p2)
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%resolveCall3 = inttoptr i64 244837814038255 to i8*
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tail call webkit_jscc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 20, i8* %resolveCall3, i32 2, i64 %p4, i64 %result)
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ret void
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}
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; Test if the arguments are properly aligned and that we don't store undef arguments.
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define i64 @jscall_patchpoint_codegen2(i64 %callee) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen2:
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; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6
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; CHECK-NEXT: str x[[REG]], [sp, #24]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
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; CHECK-NEXT: str w[[REG]], [sp, #16]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
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; CHECK-NEXT: str x[[REG]], [sp]
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; CHECK: Ltmp
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; CHECK-NEXT: mov x16, #281470681743360
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; CHECK-NEXT: movk x16, #57005, lsl #16
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; CHECK-NEXT: movk x16, #48879
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; CHECK-NEXT: blr x16
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; FAST-LABEL: jscall_patchpoint_codegen2:
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; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
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; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
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; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
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; FAST-NEXT: str [[REG1]], [sp]
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; FAST-NEXT: str [[REG2]], [sp, #16]
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; FAST-NEXT: str [[REG3]], [sp, #24]
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; FAST: Ltmp
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; FAST-NEXT: mov x16, #281470681743360
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; FAST-NEXT: movk x16, #57005, lsl #16
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; FAST-NEXT: movk x16, #48879
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; FAST-NEXT: blr x16
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%call = inttoptr i64 281474417671919 to i8*
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%result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6)
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ret i64 %result
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}
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; Test if the arguments are properly aligned and that we don't store undef arguments.
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define i64 @jscall_patchpoint_codegen3(i64 %callee) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen3:
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; CHECK: mov w[[REG:[0-9]+]], #10
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; CHECK-NEXT: str x[[REG]], [sp, #48]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8
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; CHECK-NEXT: str w[[REG]], [sp, #36]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6
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; CHECK-NEXT: str x[[REG]], [sp, #24]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
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; CHECK-NEXT: str w[[REG]], [sp, #16]
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; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
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; CHECK-NEXT: str x[[REG]], [sp]
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; CHECK: Ltmp
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; CHECK-NEXT: mov x16, #281470681743360
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; CHECK-NEXT: movk x16, #57005, lsl #16
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; CHECK-NEXT: movk x16, #48879
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; CHECK-NEXT: blr x16
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; FAST-LABEL: jscall_patchpoint_codegen3:
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; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
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; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
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; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
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; FAST-NEXT: orr [[REG4:w[0-9]+]], wzr, #0x8
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; FAST-NEXT: mov [[REG5:x[0-9]+]], #10
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; FAST-NEXT: str [[REG1]], [sp]
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; FAST-NEXT: str [[REG2]], [sp, #16]
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; FAST-NEXT: str [[REG3]], [sp, #24]
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; FAST-NEXT: str [[REG4]], [sp, #36]
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; FAST-NEXT: str [[REG5]], [sp, #48]
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; FAST: Ltmp
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; FAST-NEXT: mov x16, #281470681743360
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; FAST-NEXT: movk x16, #57005, lsl #16
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; FAST-NEXT: movk x16, #48879
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; FAST-NEXT: blr x16
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%call = inttoptr i64 281474417671919 to i8*
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%result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10)
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ret i64 %result
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}
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; CHECK-LABEL: test_i16:
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; CHECK: ldrh [[BREG:w[0-9]+]], [sp]
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; CHECK: add {{w[0-9]+}}, w0, [[BREG]]
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define webkit_jscc zeroext i16 @test_i16(i16 zeroext %a, i16 zeroext %b) {
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%sum = add i16 %a, %b
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ret i16 %sum
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}
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declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
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declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
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