43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
34 lines
814 B
YAML
34 lines
814 B
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses fixed stack objects correctly.
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--- |
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define i32 @test(i32 %a) #0 {
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entry:
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%b = alloca i32
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store i32 %a, i32* %b
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%c = load i32, i32* %b
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ret i32 %c
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}
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attributes #0 = { "no-frame-pointer-elim"="false" }
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...
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---
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name: test
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frameInfo:
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maxAlignment: 4
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# CHECK: fixedStack:
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# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
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# CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true }
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fixedStack:
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- { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
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stack:
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- { id: 0, offset: -12, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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MOV32mr $rsp, 1, _, -4, _, $edi
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$eax = COPY $edi
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RETQ $eax
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...
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