57a705d9d0
The idea of this patch is to continue the scheduler state over an MBB boundary in the case where the successor block has only one predecessor. This means that the scheduler will continue in the successor block (after emitting any branch instructions) with e.g. maintained processor resource counters. Benchmarks have been confirmed to benefit from this. The algorithm in MachineScheduler.cpp that extracts scheduling regions of an MBB has been extended so that the strategy may optionally reverse the order of processing the regions themselves. This is controlled by a new method doMBBSchedRegionsTopDown(), which defaults to false. Handling the top-most region of an MBB first also means that a top-down scheduler can continue the scheduler state across any scheduling boundary between to regions inside MBB. Review: Ulrich Weigand, Matthias Braun, Andy Trick. https://reviews.llvm.org/D35053 llvm-svn: 311072
246 lines
6.0 KiB
LLVM
246 lines
6.0 KiB
LLVM
; Test the use of TM and TMY.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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@g = global i32 0
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; Check a simple branching use of TM.
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define void @f1(i8 *%src) {
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; CHECK-LABEL: f1:
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; CHECK: tm 0(%r2), 1
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; CHECK: ber %r14
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; CHECK: br %r14
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entry:
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check that we do not fold across an aliasing store.
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define void @f2(i8 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: llc [[REG:%r[0-5]]], 0(%r2)
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; CHECK-DAG: mvi 0(%r2), 0
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; CHECK-DAG: tmll [[REG]], 1
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; CHECK: ber %r14
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; CHECK: br %r14
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entry:
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%byte = load i8 , i8 *%src
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store i8 0, i8 *%src
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check a simple select-based use of TM.
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define double @f3(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f3:
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; CHECK: tm 0(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check that we do not fold across an aliasing store.
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define double @f4(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f4:
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; CHECK: tm 0(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: mvi 0(%r2), 0
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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store i8 0, i8 *%src
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ret double %res
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}
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; Check an inequality check.
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define double @f5(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f5:
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; CHECK: tm 0(%r2), 1
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 1
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%cmp = icmp ne i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check that we can also use TM for equality comparisons with the mask.
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define double @f6(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f6:
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; CHECK: tm 0(%r2), 254
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; CHECK: jo {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 254
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%cmp = icmp eq i8 %and, 254
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check inequality comparisons with the mask.
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define double @f7(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f7:
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; CHECK: tm 0(%r2), 254
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; CHECK: jno {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 254
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%cmp = icmp ne i8 %and, 254
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check that we do not use the memory TM instruction when CC is being tested
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; for 2.
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define double @f8(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f8:
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; CHECK: llc [[REG:%r[0-5]]], 0(%r2)
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; CHECK: tmll [[REG]], 3
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; CHECK: jh {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 3
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%cmp = icmp eq i8 %and, 2
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; ...likewise 1.
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define double @f9(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f9:
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; CHECK: llc [[REG:%r[0-5]]], 0(%r2)
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; CHECK: tmll [[REG]], 3
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; CHECK: jl {{\.L.*}}
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; CHECK: br %r14
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%byte = load i8 , i8 *%src
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%and = and i8 %byte, 3
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%cmp = icmp eq i8 %and, 1
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the high end of the TM range.
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define double @f10(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f10:
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; CHECK: tm 4095(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 4095
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the low end of the positive TMY range.
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define double @f11(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f11:
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; CHECK: tmy 4096(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 4096
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the high end of the TMY range.
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define double @f12(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f12:
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; CHECK: tmy 524287(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 524287
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the next byte up, which needs separate address logic.
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define double @f13(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f13:
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; CHECK: agfi %r2, 524288
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; CHECK: tm 0(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 524288
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the low end of the TMY range.
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define double @f14(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f14:
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; CHECK: tmy -524288(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 -524288
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check the next byte down, which needs separate address logic.
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define double @f15(i8 *%src, double %a, double %b) {
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; CHECK-LABEL: f15:
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; CHECK: agfi %r2, -524289
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; CHECK: tm 0(%r2), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 -524289
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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; Check that TM(Y) does not allow an index
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define double @f16(i8 *%src, i64 %index, double %a, double %b) {
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; CHECK-LABEL: f16:
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; CHECK: tm 0({{%r[1-5]}}), 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%src, i64 %index
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%byte = load i8 , i8 *%ptr
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%and = and i8 %byte, 1
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%cmp = icmp eq i8 %and, 0
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%res = select i1 %cmp, double %b, double %a
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ret double %res
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}
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