25528d6de7
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
101 lines
2.7 KiB
LLVM
101 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
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define double @long_to_double_rr(i64 %a) {
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; SSE2-LABEL: long_to_double_rr:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: cvtsi2sdq %rdi, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_double_rr:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = sitofp i64 %a to double
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ret double %0
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}
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define double @long_to_double_rm(i64* %a) {
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; SSE2-LABEL: long_to_double_rm:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: movq (%rdi), %rax
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; SSE2-NEXT: cvtsi2sdq %rax, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_double_rm:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2sdq (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load i64, i64* %a
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%1 = sitofp i64 %0 to double
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ret double %1
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}
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define double @long_to_double_rm_optsize(i64* %a) optsize {
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; SSE2-LABEL: long_to_double_rm_optsize:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: cvtsi2sdq (%rdi), %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_double_rm_optsize:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2sdq (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load i64, i64* %a
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%1 = sitofp i64 %0 to double
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ret double %1
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}
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define float @long_to_float_rr(i64 %a) {
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; SSE2-LABEL: long_to_float_rr:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: cvtsi2ssq %rdi, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_float_rr:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = sitofp i64 %a to float
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ret float %0
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}
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define float @long_to_float_rm(i64* %a) {
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; SSE2-LABEL: long_to_float_rm:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: movq (%rdi), %rax
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; SSE2-NEXT: cvtsi2ssq %rax, %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_float_rm:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2ssq (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load i64, i64* %a
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%1 = sitofp i64 %0 to float
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ret float %1
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}
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define float @long_to_float_rm_optsize(i64* %a) optsize {
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; SSE2-LABEL: long_to_float_rm_optsize:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: cvtsi2ssq (%rdi), %xmm0
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: long_to_float_rm_optsize:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtsi2ssq (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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entry:
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%0 = load i64, i64* %a
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%1 = sitofp i64 %0 to float
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ret float %1
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}
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