43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
13 lines
379 B
LLVM
13 lines
379 B
LLVM
; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
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target triple = "x86_64--"
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define i8 @main(i8 %X) {
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%inc = add i8 %X, 1
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%inc2 = mul i8 %inc, 5
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; Here only CL is clobbred so CH should not be clobbred, but CX, ECX and RCX
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; should be clobbered.
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; CHECK: main Clobbered Registers: $ah $al $ax $cl $cx $eax $ecx $eflags $rax $rcx
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ret i8 %inc2
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}
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