43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
41 lines
1.2 KiB
LLVM
41 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple i386-unknown-linux-gnu < %s | FileCheck %s
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; Previously, a reference to SIL/DIL was being emitted
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; but those aren't available unless on a 64bit mode
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define void @t1(i8 signext %c) {
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; CHECK-LABEL: t1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %edi, -8
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %edi
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; CHECK-NEXT: # kill: def $di killed $di killed $edi
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: retl
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entry:
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tail call void asm sideeffect "", "{di},~{dirflag},~{fpsr},~{flags}"(i8 %c)
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ret void
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}
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define void @t2(i8 signext %c) {
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; CHECK-LABEL: t2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %esi, -8
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: # kill: def $si killed $si killed $esi
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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entry:
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tail call void asm sideeffect "", "{si},~{dirflag},~{fpsr},~{flags}"(i8 %c)
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ret void
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}
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