Oliver Stannard 6df8f43c4d [AArch64] Fix spelling of ICH_ELRSR_EL2 system register ...

This register was mis-spelled as ICH_ELSR_EL2, but has the correct encoding for
ICH_ELRSR_EL2.

llvm-svn: 324325

2018-02-06 09:39:04 +00:00

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a64-ignored-fields.txt

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arm64-advsimd.txt

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arm64-arithmetic.txt

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arm64-basic-a64-undefined.txt

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arm64-bitfield.txt

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arm64-branch.txt

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arm64-canonical-form.txt

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arm64-crc32.txt

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arm64-crypto.txt

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arm64-invalid-logical.txt

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arm64-logical.txt

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arm64-memory.txt

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arm64-non-apple-fmov.txt

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arm64-scalar-fp.txt

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arm64-system.txt

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armv8.1a-atomic.txt

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armv8.1a-lor.txt

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armv8.1a-pan.txt

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armv8.1a-rdma.txt

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armv8.1a-vhe.txt

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armv8.2a-at.txt

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armv8.2a-dotprod.txt

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armv8.2a-mmfr2.txt

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armv8.2a-persistent-memory.txt

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armv8.2a-statistical-profiling.txt

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armv8.2a-uao.txt

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armv8.3a-complex.txt

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armv8.3a-ID_ISAR6_EL1.txt

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armv8.3a-js.txt

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armv8.3a-rcpc.txt

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armv8.3a-signed-pointer.txt

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basic-a64-instructions.txt

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basic-a64-undefined.txt

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basic-a64-unpredictable.txt

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csdb.txt

[ARM][AArch64] Add CSDB speculation barrier instruction

2018-02-06 09:24:47 +00:00

fullfp16-neg.txt

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fullfp16-neon-neg.txt

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gicv3-regs.txt

[AArch64] Fix spelling of ICH_ELRSR_EL2 system register

2018-02-06 09:39:04 +00:00

ldp-offset-predictable.txt

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ldp-postind.predictable.txt

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ldp-preind.predictable.txt

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lit.local.cfg

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neon-instructions.txt

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ras-extension.txt

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trace-regs.txt

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