Dmitry Preobrazhensky d6e1a9404d [AMDGPU][MC] Added lds support for MUBUF instructions ...

See bug 28234: https://bugs.llvm.org/show_bug.cgi?id=28234

Differential Revision: https://reviews.llvm.org/D43472

Reviewers: vpykhtin, artem.tamazov, arsenm
llvm-svn: 325676

2018-02-21 13:13:48 +00:00

..

aperture-regs.ll

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buf_fmt_packed_d16.txt

AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace.

2018-01-30 16:42:40 +00:00

buf_fmt_unpacked_d16.txt

AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace.

2018-01-30 16:42:40 +00:00

dpp_vi.txt

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ds_vi.txt

[AMDGPU][MC] Corrected parsing of optional operands for ds_swizzle_b32

2017-12-22 17:13:28 +00:00

exp_vi.txt

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flat_gfx9.txt

[AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers

2017-12-29 13:55:11 +00:00

flat_vi.txt

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gfx8_dasm_all.txt

[AMDGPU][mc][tests] Updated generated lit tests for GFX8/9

2017-11-22 15:47:27 +00:00

gfx9_dasm_all.txt

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

lit.local.cfg

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literal16_vi.txt

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mac.txt

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mimg_vi.txt

[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier

2018-02-05 14:18:53 +00:00

mov.txt

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mtbuf_vi.txt

[AMDGPU] Add intrinsics for tbuffer load and store

2017-06-22 16:29:22 +00:00

mubuf_vi.txt

[AMDGPU][MC] Added lds support for MUBUF instructions

2018-02-21 13:13:48 +00:00

nop.txt

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sdwa_gfx9.txt

[AMDGPU][MC][GFX9] Enable inline constants for SDWA operands

2018-01-17 14:00:48 +00:00

sdwa_vi.txt

[AMDGPU] SDWA: remove omod src operand for VOP2b instructions

2017-11-21 14:11:59 +00:00

si-support.txt

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smem_vi.txt

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smrd_vi.txt

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sop1_vi.txt

[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support

2018-01-10 14:22:19 +00:00

sop2_vi.txt

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sopc_vi.txt

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sopk_vi.txt

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sopp_vi.txt

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trap_gfx9.txt

[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers

2017-12-22 15:18:06 +00:00

trap_vi.txt

[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers

2017-12-22 15:18:06 +00:00

vintrp.txt

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vop1_gfx9.txt

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

vop1_vi.txt

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vop1.txt

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vop2_vi.txt

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

vop3_gfx9.txt

[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support

2018-01-10 14:22:19 +00:00

vop3_vi.txt

[AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodes

2017-08-16 13:51:56 +00:00

vopc_vi.txt

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