Summary: (This is a second attempt as https://reviews.llvm.org/D34822 was reverted.) LazyValueInfo currently computes the constant value of the switch condition through case edges, which allows the constant value to be propagated through the case edges. But we have seen a case where a zero-extended value of the switch condition is used past case edges for which the constant propagation doesn't occur. This patch adds a small logic to handle such a case in getEdgeValueLocal(). This is motivated by the Python 2.7 eval loop in PyEval_EvalFrameEx() where the lack of the constant propagation causes longer live ranges and more spill code than necessary. With this patch, we see that the code size of PyEval_EvalFrameEx() decreases by ~5.4% and a performance test improves by ~4.6%. Reviewers: sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36247 llvm-svn: 309986
606 lines
11 KiB
LLVM
606 lines
11 KiB
LLVM
; RUN: opt -correlated-propagation -S < %s | FileCheck %s
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declare i32 @foo()
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define i32 @test1(i32 %a) nounwind {
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%a.off = add i32 %a, -8
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%cmp = icmp ult i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 7
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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; CHECK-LABEL: @test1(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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}
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define i32 @test2(i32 %a) nounwind {
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%a.off = add i32 %a, -8
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%cmp = icmp ult i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp ugt i32 %a, 15
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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; CHECK-LABEL: @test2(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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}
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; CHECK-LABEL: @test3(
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define i32 @test3(i32 %c) nounwind {
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%cmp = icmp slt i32 %c, 2
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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ret i32 1
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if.end:
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%cmp1 = icmp slt i32 %c, 3
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br i1 %cmp1, label %if.then2, label %if.end8
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; CHECK: if.then2
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if.then2:
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%cmp2 = icmp eq i32 %c, 2
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; CHECK: br i1 true
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br i1 %cmp2, label %if.then4, label %if.end6
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; CHECK: if.end6
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if.end6:
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ret i32 2
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if.then4:
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ret i32 3
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if.end8:
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ret i32 4
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}
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; CHECK-LABEL: @test4(
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define i32 @test4(i32 %c) nounwind {
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switch i32 %c, label %sw.default [
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i32 1, label %sw.bb
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i32 2, label %sw.bb
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i32 4, label %sw.bb
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]
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; CHECK: sw.bb
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sw.bb:
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%cmp = icmp sge i32 %c, 1
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; CHECK: br i1 true
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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br label %return
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if.end:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 42, %sw.default ], [ 4, %if.then ], [ 9, %if.end ]
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ret i32 %retval.0
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}
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; CHECK-LABEL: @test5(
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define i1 @test5(i32 %c) nounwind {
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%cmp = icmp slt i32 %c, 5
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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%cmp1 = icmp eq i32 %c, 4
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br i1 %cmp1, label %if.end, label %if.end8
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if.end:
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ret i1 true
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if.end8:
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%cmp2 = icmp eq i32 %c, 3
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%cmp3 = icmp eq i32 %c, 4
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%cmp4 = icmp eq i32 %c, 6
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; CHECK: %or = or i1 false, false
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%or = or i1 %cmp3, %cmp4
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; CHECK: ret i1 %cmp2
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ret i1 %cmp2
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}
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; CHECK-LABEL: @test6(
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define i1 @test6(i32 %c) nounwind {
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%cmp = icmp ule i32 %c, 7
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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; CHECK: icmp eq i32 %c, 6
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; CHECK: br i1
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switch i32 %c, label %if.end [
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i32 6, label %sw.bb
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i32 8, label %sw.bb
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]
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if.end:
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ret i1 true
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sw.bb:
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%cmp2 = icmp eq i32 %c, 6
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; CHECK: ret i1 true
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ret i1 %cmp2
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}
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; CHECK-LABEL: @test7(
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define i1 @test7(i32 %c) nounwind {
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entry:
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switch i32 %c, label %sw.default [
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i32 6, label %sw.bb
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i32 7, label %sw.bb
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]
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sw.bb:
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ret i1 true
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sw.default:
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%cmp5 = icmp eq i32 %c, 5
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%cmp6 = icmp eq i32 %c, 6
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%cmp7 = icmp eq i32 %c, 7
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%cmp8 = icmp eq i32 %c, 8
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; CHECK: %or = or i1 %cmp5, false
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%or = or i1 %cmp5, %cmp6
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; CHECK: %or2 = or i1 false, %cmp8
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%or2 = or i1 %cmp7, %cmp8
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ret i1 false
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}
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define i1 @test8(i64* %p) {
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; CHECK-LABEL: @test8
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; CHECK: ret i1 false
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%a = load i64, i64* %p, !range !{i64 4, i64 255}
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%res = icmp eq i64 %a, 0
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ret i1 %res
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}
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define i1 @test9(i64* %p) {
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; CHECK-LABEL: @test9
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; CHECK: ret i1 true
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%a = load i64, i64* %p, !range !{i64 0, i64 1}
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%res = icmp eq i64 %a, 0
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ret i1 %res
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}
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define i1 @test10(i64* %p) {
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; CHECK-LABEL: @test10
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; CHECK: ret i1 false
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%a = load i64, i64* %p, !range !{i64 4, i64 8, i64 15, i64 20}
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%res = icmp eq i64 %a, 0
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ret i1 %res
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}
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@g = external global i32
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define i1 @test11() {
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; CHECK: @test11
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; CHECK: ret i1 true
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%positive = load i32, i32* @g, !range !{i32 1, i32 2048}
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%add = add i32 %positive, 1
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%test = icmp sgt i32 %add, 0
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br label %next
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next:
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ret i1 %test
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}
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define i32 @test12(i32 %a, i32 %b) {
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; CHECK-LABEL: @test12(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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%cmp = icmp ult i32 %a, %b
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, -1
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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}
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define i32 @test12_swap(i32 %a, i32 %b) {
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; CHECK-LABEL: @test12_swap(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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%cmp = icmp ugt i32 %b, %a
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, -1
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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}
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define i32 @test12_neg(i32 %a, i32 %b) {
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; The same as @test12 but the second check is on the false path
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; CHECK-LABEL: @test12_neg(
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; CHECK: else:
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; CHECK-NEXT: %alive = icmp eq i32 %a, -1
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%cmp = icmp ult i32 %a, %b
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br i1 %cmp, label %then, label %else
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else:
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%alive = icmp eq i32 %a, -1
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br i1 %alive, label %end, label %then
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then:
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ret i32 1
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end:
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ret i32 2
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}
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define i32 @test12_signed(i32 %a, i32 %b) {
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; The same as @test12 but with signed comparison
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; CHECK-LABEL: @test12_signed(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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%cmp = icmp slt i32 %a, %b
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 2147483647
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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}
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define i32 @test13(i32 %a, i32 %b) {
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; CHECK-LABEL: @test13(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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%a.off = add i32 %a, -8
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%cmp = icmp ult i32 %a.off, %b
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 7
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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}
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define i32 @test13_swap(i32 %a, i32 %b) {
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; CHECK-LABEL: @test13_swap(
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; CHECK: then:
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; CHECK-NEXT: br i1 false, label %end, label %else
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%a.off = add i32 %a, -8
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%cmp = icmp ugt i32 %b, %a.off
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 7
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br i1 %dead, label %end, label %else
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else:
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ret i32 1
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end:
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ret i32 2
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}
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define i1 @test14_slt(i32 %a) {
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; CHECK-LABEL: @test14_slt(
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; CHECK: then:
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; CHECK-NEXT: %result = or i1 false, false
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%a.off = add i32 %a, -8
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%cmp = icmp slt i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead.1 = icmp eq i32 %a, -2147483641
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%dead.2 = icmp eq i32 %a, 16
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%result = or i1 %dead.1, %dead.2
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_sle(i32 %a) {
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; CHECK-LABEL: @test14_sle(
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; CHECK: then:
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; CHECK-NEXT: %alive = icmp eq i32 %a, 16
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; CHECK-NEXT: %result = or i1 false, %alive
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%a.off = add i32 %a, -8
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%cmp = icmp sle i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, -2147483641
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%alive = icmp eq i32 %a, 16
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%result = or i1 %dead, %alive
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_sgt(i32 %a) {
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; CHECK-LABEL: @test14_sgt(
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; CHECK: then:
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; CHECK-NEXT: %result = or i1 false, false
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%a.off = add i32 %a, -8
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%cmp = icmp sgt i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead.1 = icmp eq i32 %a, -2147483640
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%dead.2 = icmp eq i32 %a, 16
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%result = or i1 %dead.1, %dead.2
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_sge(i32 %a) {
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; CHECK-LABEL: @test14_sge(
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; CHECK: then:
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; CHECK-NEXT: %alive = icmp eq i32 %a, 16
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; CHECK-NEXT: %result = or i1 false, %alive
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%a.off = add i32 %a, -8
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%cmp = icmp sge i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, -2147483640
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%alive = icmp eq i32 %a, 16
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%result = or i1 %dead, %alive
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_ule(i32 %a) {
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; CHECK-LABEL: @test14_ule(
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; CHECK: then:
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; CHECK-NEXT: %alive = icmp eq i32 %a, 16
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; CHECK-NEXT: %result = or i1 false, %alive
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%a.off = add i32 %a, -8
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%cmp = icmp ule i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 7
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%alive = icmp eq i32 %a, 16
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%result = or i1 %dead, %alive
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_ugt(i32 %a) {
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; CHECK-LABEL: @test14_ugt(
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; CHECK: then:
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; CHECK-NEXT: %result = or i1 false, false
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%a.off = add i32 %a, -8
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%cmp = icmp ugt i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead.1 = icmp eq i32 %a, 8
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%dead.2 = icmp eq i32 %a, 16
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%result = or i1 %dead.1, %dead.2
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ret i1 %result
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else:
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ret i1 false
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}
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define i1 @test14_uge(i32 %a) {
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; CHECK-LABEL: @test14_uge(
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; CHECK: then:
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; CHECK-NEXT: %alive = icmp eq i32 %a, 16
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; CHECK-NEXT: %result = or i1 false, %alive
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%a.off = add i32 %a, -8
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%cmp = icmp uge i32 %a.off, 8
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br i1 %cmp, label %then, label %else
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then:
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%dead = icmp eq i32 %a, 8
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%alive = icmp eq i32 %a, 16
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%result = or i1 %dead, %alive
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ret i1 %result
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else:
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ret i1 false
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}
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@limit = external global i32
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define i1 @test15(i32 %a) {
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; CHECK-LABEL: @test15(
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; CHECK: then:
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; CHECK-NEXT: ret i1 false
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%limit = load i32, i32* @limit, !range !{i32 0, i32 256}
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%cmp = icmp ult i32 %a, %limit
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br i1 %cmp, label %then, label %else
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then:
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%result = icmp eq i32 %a, 255
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ret i1 %result
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else:
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ret i1 false
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}
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define i32 @test16(i8 %a) {
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entry:
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%b = zext i8 %a to i32
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br label %dispatch
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dispatch:
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%cmp = icmp eq i8 %a, 93
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br i1 %cmp, label %target93, label %dispatch
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; CHECK-LABEL: @test16(
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; CHECK: target93:
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; CHECK-NEXT: ret i32 93
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target93:
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ret i32 %b
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}
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define i32 @test16_i1(i1 %a) {
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entry:
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%b = zext i1 %a to i32
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br label %dispatch
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dispatch:
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br i1 %a, label %true, label %dispatch
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; CHECK-LABEL: @test16_i1(
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; CHECK: true:
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; CHECK-NEXT: ret i32 1
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true:
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ret i32 %b
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}
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define i8 @test17(i8 %a) {
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entry:
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%c = add i8 %a, 3
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br label %dispatch
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dispatch:
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%cmp = icmp eq i8 %a, 93
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br i1 %cmp, label %target93, label %dispatch
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; CHECK-LABEL: @test17(
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; CHECK: target93:
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; CHECK-NEXT: ret i8 96
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target93:
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ret i8 %c
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}
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define i8 @test17_2(i8 %a) {
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entry:
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%c = add i8 %a, %a
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br label %dispatch
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dispatch:
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%cmp = icmp eq i8 %a, 93
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br i1 %cmp, label %target93, label %dispatch
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; CHECK-LABEL: @test17_2(
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; CHECK: target93:
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; CHECK-NEXT: ret i8 -70
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target93:
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ret i8 %c
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}
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define i1 @test17_i1(i1 %a) {
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entry:
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%c = and i1 %a, true
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br label %dispatch
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dispatch:
|
|
br i1 %a, label %true, label %dispatch
|
|
|
|
; CHECK-LABEL: @test17_i1(
|
|
; CHECK: true:
|
|
; CHECK-NEXT: ret i1 true
|
|
true:
|
|
ret i1 %c
|
|
}
|
|
|
|
define i32 @test18(i8 %a) {
|
|
entry:
|
|
%b = zext i8 %a to i32
|
|
br label %dispatch
|
|
|
|
dispatch:
|
|
switch i8 %a, label %dispatch [
|
|
i8 93, label %target93
|
|
i8 -111, label %dispatch
|
|
]
|
|
|
|
; CHECK-LABEL: @test18(
|
|
; CHECK: target93:
|
|
; CHECK-NEXT: ret i32 93
|
|
target93:
|
|
ret i32 %b
|
|
}
|
|
|
|
define i8 @test19(i8 %a) {
|
|
entry:
|
|
%c = add i8 %a, 3
|
|
br label %dispatch
|
|
|
|
dispatch:
|
|
switch i8 %a, label %dispatch [
|
|
i8 93, label %target93
|
|
i8 -111, label %dispatch
|
|
]
|
|
|
|
; CHECK-LABEL: @test19(
|
|
; CHECK: target93:
|
|
; CHECK-NEXT: ret i8 96
|
|
target93:
|
|
ret i8 %c
|
|
}
|
|
|
|
define i1 @test20(i64 %a) {
|
|
entry:
|
|
%b = and i64 %a, 7
|
|
br label %dispatch
|
|
|
|
dispatch:
|
|
switch i64 %a, label %default [
|
|
i64 0, label %exit2
|
|
i64 -2147483647, label %exit2
|
|
]
|
|
|
|
default:
|
|
%c = icmp eq i64 %b, 0
|
|
br label %exit
|
|
|
|
exit:
|
|
; Negative test. Shouldn't be incorrectly optimized to "ret i1 false".
|
|
; CHECK-LABEL: @test20(
|
|
; CHECK: exit:
|
|
; CHECK-NOT: ret i1 false
|
|
; CHECK: exit2:
|
|
ret i1 %c
|
|
|
|
exit2:
|
|
ret i1 false
|
|
}
|