Files
clang-p2996/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
Mirko Brkusanin 36527cbe02 [AMDGPU][GlobalISel] Legalize memcpy family of intrinsics
Legalize G_MEMCPY, G_MEMMOVE, G_MEMSET and G_MEMCPY_INLINE.

Corresponding intrinsics are replaced by a loop that uses loads/stores in
AMDGPULowerIntrinsics pass unless their length is a constant lower then
MemIntrinsicExpandSizeThresholdOpt (default 1024). Any G_MEM* instruction that
reaches legalizer should have a const length argument and should be expanded
into appropriate number of loads + stores.

Differential Revision: https://reviews.llvm.org/D108357
2021-09-07 12:24:07 +02:00

31 lines
1.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -march=amdgcn -verify-machineinstrs -amdgpu-mem-intrinsic-expand-size=3 %s -o - | FileCheck -check-prefix=GCN %s
; RUN: llc -global-isel -march=amdgcn -verify-machineinstrs -amdgpu-mem-intrinsic-expand-size=5 %s -o - | FileCheck -check-prefix=GCN %s
declare void @llvm.memcpy.inline.p1i8.p1i8.i32(i8 addrspace(1)*, i8 addrspace(1)*, i32, i1 immarg)
define amdgpu_cs void @test(i8 addrspace(1)* %dst, i8 addrspace(1)* %src) {
; GCN-LABEL: test:
; GCN: ; %bb.0:
; GCN-NEXT: s_mov_b32 s2, 0
; GCN-NEXT: s_mov_b32 s3, 0xf000
; GCN-NEXT: s_mov_b64 s[0:1], 0
; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64 offset:1
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64 offset:1
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: buffer_load_ubyte v4, v[2:3], s[0:3], 0 addr64 offset:2
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_store_byte v4, v[0:1], s[0:3], 0 addr64 offset:2
; GCN-NEXT: buffer_load_ubyte v2, v[2:3], s[0:3], 0 addr64 offset:3
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_store_byte v2, v[0:1], s[0:3], 0 addr64 offset:3
; GCN-NEXT: s_endpgm
call void @llvm.memcpy.inline.p1i8.p1i8.i32(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i32 4, i1 false)
ret void
}