ba627a32e1
This patch includes the following updates to the load/store refactoring effort introduced in D93370: - Update various VSX patterns that use to "force" an XForm, to instead just XForm. This allows the ability for the patterns to compute the most optimal addressing mode (and to produce a DForm instruction when possible) - Update pattern and test case for the LXVD2X/STXVD2X intrinsics - Update LIT test cases that use to use the XForm instruction to use the DForm instruction Differential Revision: https://reviews.llvm.org/D95115
33 lines
1.2 KiB
LLVM
33 lines
1.2 KiB
LLVM
; Function Attrs: norecurse nounwind
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; RUN: llc -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 < %s | FileCheck %s
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define void @test1(i32* nocapture readonly %arr, i32* nocapture %arrTo) {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 4
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%0 = bitcast i32* %arrayidx to <4 x i32>*
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%arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 4
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%1 = bitcast i32* %arrayidx1 to <4 x i32>*
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%2 = load <4 x i32>, <4 x i32>* %1, align 16
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store <4 x i32> %2, <4 x i32>* %0, align 16
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ret void
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; CHECK-LABEL: test1
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; CHECK: lxv [[LD:[0-9]+]], 16(3)
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; CHECK: stxv [[LD]], 16(4)
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}
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; Function Attrs: norecurse nounwind
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define void @test2(i32* nocapture readonly %arr, i32* nocapture %arrTo) {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 1
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%0 = bitcast i32* %arrayidx to <4 x i32>*
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%arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 2
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%1 = bitcast i32* %arrayidx1 to <4 x i32>*
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%2 = load <4 x i32>, <4 x i32>* %1, align 16
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store <4 x i32> %2, <4 x i32>* %0, align 16
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ret void
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; CHECK-LABEL: test2
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; CHECK: li [[REG:[0-9]+]], 8
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; CHECK: lxvx [[LD:[0-9]+]], 3, [[REG]]
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; CHECK: li [[REG2:[0-9]+]], 4
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; CHECK: stxvx [[LD]], 4, [[REG2]]
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}
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