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clang-p2996/llvm/test/CodeGen/X86/fshr.ll
Matt Arsenault 4a36e96c3f RegAllocGreedy: Account for reserved registers in num regs heuristic 
This simple heuristic uses the estimated live range length combined
with the number of registers in the class to switch which heuristic to
use. This was taking the raw number of registers in the class, even
though not all of them may be available. AMDGPU heavily relies on
dynamically reserved numbers of registers based on user attributes to
satisfy occupancy constraints, so the raw number is highly misleading.

There are still a few problems here. In the original testcase that
made me notice this, the live range size is incorrect after the
scheduler rearranges instructions, since the instructions don't have
the original InstrDist offsets. Additionally, I think it would be more
appropriate to use the number of disjointly allocatable registers in
the class. For the AMDGPU register tuples, there are a large number of
registers in each tuple class, but only a small fraction can actually
be allocated at the same time since they all overlap with each
other. It seems we do not have a query that corresponds to the number
of independently allocatable registers. Relatedly, I'm still debugging
some allocation failures where overlapping tuples seem to not be
handled correctly.

The test changes are mostly noise. There are a handful of x86 tests
that look like regressions with an additional spill, and a handful
that now avoid a spill. The worst looking regression is likely
test/Thumb2/mve-vld4.ll which introduces a few additional
spills. test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
shows a massive improvement by completely eliminating a large number
of spills inside a loop.
2021-09-14 21:00:29 -04:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86,X86-FAST
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X86,X86-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,X64-FAST
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X64,X64-SLOW
declare i8 @llvm.fshr.i8(i8, i8, i8) nounwind readnone
declare i16 @llvm.fshr.i16(i16, i16, i16) nounwind readnone
declare i32 @llvm.fshr.i32(i32, i32, i32) nounwind readnone
declare i64 @llvm.fshr.i64(i64, i64, i64) nounwind readnone
declare i128 @llvm.fshr.i128(i128, i128, i128) nounwind readnone
;
; Variable Funnel Shift
;
define i8 @var_shift_i8(i8 %x, i8 %y, i8 %z) nounwind {
; X86-LABEL: var_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $8, %eax
; X86-NEXT: orl %edx, %eax
; X86-NEXT: andb $7, %cl
; X86-NEXT: shrl %cl, %eax
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl
;
; X64-LABEL: var_shift_i8:
; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: shll $8, %edi
; X64-NEXT: movzbl %sil, %eax
; X64-NEXT: orl %edi, %eax
; X64-NEXT: andb $7, %cl
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shrl %cl, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%tmp = tail call i8 @llvm.fshr.i8(i8 %x, i8 %y, i8 %z)
ret i8 %tmp
}
define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
; X86-FAST-LABEL: var_shift_i16:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: andb $15, %cl
; X86-FAST-NEXT: shrdw %cl, %dx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shll $16, %eax
; X86-SLOW-NEXT: orl %edx, %eax
; X86-SLOW-NEXT: andb $15, %cl
; X86-SLOW-NEXT: shrl %cl, %eax
; X86-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: var_shift_i16:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movl %edx, %ecx
; X64-FAST-NEXT: movl %esi, %eax
; X64-FAST-NEXT: andb $15, %cl
; X64-FAST-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-FAST-NEXT: shrdw %cl, %di, %ax
; X64-FAST-NEXT: # kill: def $ax killed $ax killed $eax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: var_shift_i16:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: movl %edx, %ecx
; X64-SLOW-NEXT: shll $16, %edi
; X64-SLOW-NEXT: movzwl %si, %eax
; X64-SLOW-NEXT: orl %edi, %eax
; X64-SLOW-NEXT: andb $15, %cl
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-SLOW-NEXT: shrl %cl, %eax
; X64-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
; X64-SLOW-NEXT: retq
%tmp = tail call i16 @llvm.fshr.i16(i16 %x, i16 %y, i16 %z)
ret i16 %tmp
}
define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-FAST-LABEL: var_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl %cl, %edx, %eax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: shrl %cl, %edx
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: addl %eax, %eax
; X86-SLOW-NEXT: shll %cl, %eax
; X86-SLOW-NEXT: orl %edx, %eax
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: var_shift_i32:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movl %edx, %ecx
; X64-FAST-NEXT: movl %esi, %eax
; X64-FAST-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-FAST-NEXT: shrdl %cl, %edi, %eax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: var_shift_i32:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: movl %edx, %ecx
; X64-SLOW-NEXT: # kill: def $edi killed $edi def $rdi
; X64-SLOW-NEXT: shrl %cl, %esi
; X64-SLOW-NEXT: leal (%rdi,%rdi), %eax
; X64-SLOW-NEXT: notb %cl
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-SLOW-NEXT: shll %cl, %eax
; X64-SLOW-NEXT: orl %esi, %eax
; X64-SLOW-NEXT: retq
%tmp = tail call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)
ret i32 %tmp
}
define i32 @var_shift_i32_optsize(i32 %x, i32 %y, i32 %z) nounwind optsize {
; X86-LABEL: var_shift_i32_optsize:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrdl %cl, %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: var_shift_i32_optsize:
; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: movl %esi, %eax
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shrdl %cl, %edi, %eax
; X64-NEXT: retq
%tmp = tail call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)
ret i32 %tmp
}
define i32 @var_shift_i32_pgso(i32 %x, i32 %y, i32 %z) nounwind !prof !14 {
; X86-LABEL: var_shift_i32_pgso:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shrdl %cl, %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: var_shift_i32_pgso:
; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: movl %esi, %eax
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-NEXT: shrdl %cl, %edi, %eax
; X64-NEXT: retq
%tmp = tail call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)
ret i32 %tmp
}
define i64 @var_shift_i64(i64 %x, i64 %y, i64 %z) nounwind {
; X86-FAST-LABEL: var_shift_i64:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: pushl %ebp
; X86-FAST-NEXT: pushl %ebx
; X86-FAST-NEXT: pushl %edi
; X86-FAST-NEXT: pushl %esi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-FAST-NEXT: movb %bl, %ch
; X86-FAST-NEXT: notb %ch
; X86-FAST-NEXT: shldl $1, %eax, %edx
; X86-FAST-NEXT: addl %eax, %eax
; X86-FAST-NEXT: movb %ch, %cl
; X86-FAST-NEXT: shldl %cl, %eax, %edx
; X86-FAST-NEXT: movl %ebp, %edi
; X86-FAST-NEXT: movb %bl, %cl
; X86-FAST-NEXT: shrl %cl, %edi
; X86-FAST-NEXT: shrdl %cl, %ebp, %esi
; X86-FAST-NEXT: testb $32, %bl
; X86-FAST-NEXT: je .LBB5_2
; X86-FAST-NEXT: # %bb.1:
; X86-FAST-NEXT: movl %edi, %esi
; X86-FAST-NEXT: xorl %edi, %edi
; X86-FAST-NEXT: .LBB5_2:
; X86-FAST-NEXT: movb %ch, %cl
; X86-FAST-NEXT: shll %cl, %eax
; X86-FAST-NEXT: testb $32, %ch
; X86-FAST-NEXT: je .LBB5_4
; X86-FAST-NEXT: # %bb.3:
; X86-FAST-NEXT: movl %eax, %edx
; X86-FAST-NEXT: xorl %eax, %eax
; X86-FAST-NEXT: .LBB5_4:
; X86-FAST-NEXT: orl %edi, %edx
; X86-FAST-NEXT: orl %esi, %eax
; X86-FAST-NEXT: popl %esi
; X86-FAST-NEXT: popl %edi
; X86-FAST-NEXT: popl %ebx
; X86-FAST-NEXT: popl %ebp
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i64:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: pushl %ebp
; X86-SLOW-NEXT: pushl %ebx
; X86-SLOW-NEXT: pushl %edi
; X86-SLOW-NEXT: pushl %esi
; X86-SLOW-NEXT: pushl %eax
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %bl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl %eax, %edi
; X86-SLOW-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF
; X86-SLOW-NEXT: movl %ebx, %ecx
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: movl %eax, %ecx
; X86-SLOW-NEXT: shrl $31, %ecx
; X86-SLOW-NEXT: leal (%ecx,%edx,2), %edx
; X86-SLOW-NEXT: movb %bl, %ch
; X86-SLOW-NEXT: notb %ch
; X86-SLOW-NEXT: movb %ch, %cl
; X86-SLOW-NEXT: shll %cl, %edx
; X86-SLOW-NEXT: movb %bl, %cl
; X86-SLOW-NEXT: shrl %cl, %ebp
; X86-SLOW-NEXT: movl %ebp, (%esp) # 4-byte Spill
; X86-SLOW-NEXT: leal (%esi,%esi), %ebp
; X86-SLOW-NEXT: movb %ch, %cl
; X86-SLOW-NEXT: shll %cl, %ebp
; X86-SLOW-NEXT: movb %bl, %cl
; X86-SLOW-NEXT: shrl %cl, %esi
; X86-SLOW-NEXT: testb $32, %bl
; X86-SLOW-NEXT: jne .LBB5_1
; X86-SLOW-NEXT: # %bb.2:
; X86-SLOW-NEXT: orl (%esp), %ebp # 4-byte Folded Reload
; X86-SLOW-NEXT: jmp .LBB5_3
; X86-SLOW-NEXT: .LBB5_1:
; X86-SLOW-NEXT: movl %esi, %ebp
; X86-SLOW-NEXT: xorl %esi, %esi
; X86-SLOW-NEXT: .LBB5_3:
; X86-SLOW-NEXT: addl %eax, %eax
; X86-SLOW-NEXT: movb %ch, %cl
; X86-SLOW-NEXT: shll %cl, %eax
; X86-SLOW-NEXT: testb $32, %ch
; X86-SLOW-NEXT: jne .LBB5_4
; X86-SLOW-NEXT: # %bb.5:
; X86-SLOW-NEXT: orl %edi, %edx
; X86-SLOW-NEXT: jmp .LBB5_6
; X86-SLOW-NEXT: .LBB5_4:
; X86-SLOW-NEXT: movl %eax, %edx
; X86-SLOW-NEXT: xorl %eax, %eax
; X86-SLOW-NEXT: .LBB5_6:
; X86-SLOW-NEXT: orl %esi, %edx
; X86-SLOW-NEXT: orl %ebp, %eax
; X86-SLOW-NEXT: addl $4, %esp
; X86-SLOW-NEXT: popl %esi
; X86-SLOW-NEXT: popl %edi
; X86-SLOW-NEXT: popl %ebx
; X86-SLOW-NEXT: popl %ebp
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: var_shift_i64:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movq %rdx, %rcx
; X64-FAST-NEXT: movq %rsi, %rax
; X64-FAST-NEXT: # kill: def $cl killed $cl killed $rcx
; X64-FAST-NEXT: shrdq %cl, %rdi, %rax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: var_shift_i64:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: movq %rdx, %rcx
; X64-SLOW-NEXT: shrq %cl, %rsi
; X64-SLOW-NEXT: leaq (%rdi,%rdi), %rax
; X64-SLOW-NEXT: notb %cl
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $rcx
; X64-SLOW-NEXT: shlq %cl, %rax
; X64-SLOW-NEXT: orq %rsi, %rax
; X64-SLOW-NEXT: retq
%tmp = tail call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 %z)
ret i64 %tmp
}
define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-FAST-LABEL: var_shift_i128:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: pushl %ebp
; X86-FAST-NEXT: pushl %ebx
; X86-FAST-NEXT: pushl %edi
; X86-FAST-NEXT: pushl %esi
; X86-FAST-NEXT: subl $76, %esp
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-FAST-NEXT: movl %ebx, %ecx
; X86-FAST-NEXT: andl $127, %ecx
; X86-FAST-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movb %cl, %ch
; X86-FAST-NEXT: movb $64, %cl
; X86-FAST-NEXT: subb %ch, %cl
; X86-FAST-NEXT: shll %cl, %edi
; X86-FAST-NEXT: movb %cl, (%esp) # 1-byte Spill
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: movl $0, %esi
; X86-FAST-NEXT: jne .LBB6_2
; X86-FAST-NEXT: # %bb.1:
; X86-FAST-NEXT: movl %edi, %esi
; X86-FAST-NEXT: .LBB6_2:
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %eax, %edi
; X86-FAST-NEXT: movl %ebp, %eax
; X86-FAST-NEXT: shldl $1, %ebp, %edi
; X86-FAST-NEXT: addl %ebp, %eax
; X86-FAST-NEXT: notl %ebx
; X86-FAST-NEXT: andl $127, %ebx
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movb %bl, %cl
; X86-FAST-NEXT: shldl %cl, %eax, %edi
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: shll %cl, %eax
; X86-FAST-NEXT: testb $32, %bl
; X86-FAST-NEXT: movl %eax, %esi
; X86-FAST-NEXT: jne .LBB6_4
; X86-FAST-NEXT: # %bb.3:
; X86-FAST-NEXT: movl %edi, %esi
; X86-FAST-NEXT: .LBB6_4:
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-FAST-NEXT: movb %ch, %cl
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-FAST-NEXT: shrdl %cl, %edi, %esi
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %edi, %esi
; X86-FAST-NEXT: shrl %cl, %esi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-FAST-NEXT: shrl %cl, %edi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: shrdl %cl, %edx, %ebp
; X86-FAST-NEXT: testb $32, %ch
; X86-FAST-NEXT: jne .LBB6_5
; X86-FAST-NEXT: # %bb.6:
; X86-FAST-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: jmp .LBB6_7
; X86-FAST-NEXT: .LBB6_5:
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: xorl %edi, %edi
; X86-FAST-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-FAST-NEXT: .LBB6_7:
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: testb $32, %bl
; X86-FAST-NEXT: movl $0, %esi
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-FAST-NEXT: jne .LBB6_9
; X86-FAST-NEXT: # %bb.8:
; X86-FAST-NEXT: movl %eax, %esi
; X86-FAST-NEXT: .LBB6_9:
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-FAST-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-FAST-NEXT: jb .LBB6_11
; X86-FAST-NEXT: # %bb.10:
; X86-FAST-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-FAST-NEXT: .LBB6_11:
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl $31, %edi, %eax
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movb %bl, %cl
; X86-FAST-NEXT: shll %cl, %eax
; X86-FAST-NEXT: testb $32, %bl
; X86-FAST-NEXT: movl $0, %edi
; X86-FAST-NEXT: jne .LBB6_13
; X86-FAST-NEXT: # %bb.12:
; X86-FAST-NEXT: movl %eax, %edi
; X86-FAST-NEXT: .LBB6_13:
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movb (%esp), %cl # 1-byte Reload
; X86-FAST-NEXT: shldl %cl, %ebp, %eax
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: jne .LBB6_15
; X86-FAST-NEXT: # %bb.14:
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_15:
; X86-FAST-NEXT: movb %bl, %dh
; X86-FAST-NEXT: addb $-64, %dh
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: movb %dh, %cl
; X86-FAST-NEXT: shll %cl, %eax
; X86-FAST-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-FAST-NEXT: testb $32, %dh
; X86-FAST-NEXT: movl $0, %eax
; X86-FAST-NEXT: jne .LBB6_17
; X86-FAST-NEXT: # %bb.16:
; X86-FAST-NEXT: movl (%esp), %eax # 4-byte Reload
; X86-FAST-NEXT: .LBB6_17:
; X86-FAST-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-FAST-NEXT: jb .LBB6_19
; X86-FAST-NEXT: # %bb.18:
; X86-FAST-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-FAST-NEXT: .LBB6_19:
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: cmpl $64, %ebx
; X86-FAST-NEXT: jb .LBB6_21
; X86-FAST-NEXT: # %bb.20:
; X86-FAST-NEXT: xorl %esi, %esi
; X86-FAST-NEXT: .LBB6_21:
; X86-FAST-NEXT: addb $-64, %ch
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movb %ch, %cl
; X86-FAST-NEXT: shrl %cl, %eax
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: testb $32, %ch
; X86-FAST-NEXT: movl $0, %eax
; X86-FAST-NEXT: jne .LBB6_23
; X86-FAST-NEXT: # %bb.22:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: .LBB6_23:
; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-FAST-NEXT: jae .LBB6_25
; X86-FAST-NEXT: # %bb.24:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-FAST-NEXT: .LBB6_25:
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-FAST-NEXT: movb %ch, %cl
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl %cl, %eax, %ebp
; X86-FAST-NEXT: testb $32, %ch
; X86-FAST-NEXT: jne .LBB6_27
; X86-FAST-NEXT: # %bb.26:
; X86-FAST-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_27:
; X86-FAST-NEXT: cmpl $64, %ebx
; X86-FAST-NEXT: jb .LBB6_29
; X86-FAST-NEXT: # %bb.28:
; X86-FAST-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-FAST-NEXT: .LBB6_29:
; X86-FAST-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-FAST-NEXT: jae .LBB6_31
; X86-FAST-NEXT: # %bb.30:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_31:
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shldl $1, %eax, %ebp
; X86-FAST-NEXT: movl %ebp, %eax
; X86-FAST-NEXT: movl %ebx, %ecx
; X86-FAST-NEXT: shldl %cl, %edi, %eax
; X86-FAST-NEXT: testb $32, %bl
; X86-FAST-NEXT: jne .LBB6_33
; X86-FAST-NEXT: # %bb.32:
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_33:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: movb %dh, %cl
; X86-FAST-NEXT: shldl %cl, %esi, %eax
; X86-FAST-NEXT: testb $32, %dh
; X86-FAST-NEXT: jne .LBB6_35
; X86-FAST-NEXT: # %bb.34:
; X86-FAST-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_35:
; X86-FAST-NEXT: movb $64, %cl
; X86-FAST-NEXT: subb %bl, %cl
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: shrdl %cl, %eax, %esi
; X86-FAST-NEXT: shrl %cl, %eax
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: je .LBB6_37
; X86-FAST-NEXT: # %bb.36:
; X86-FAST-NEXT: movl %eax, %esi
; X86-FAST-NEXT: xorl %eax, %eax
; X86-FAST-NEXT: .LBB6_37:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-FAST-NEXT: cmpl $64, %ebx
; X86-FAST-NEXT: jae .LBB6_39
; X86-FAST-NEXT: # %bb.38:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-FAST-NEXT: orl %eax, %ecx
; X86-FAST-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_39:
; X86-FAST-NEXT: cmpl $64, %ebx
; X86-FAST-NEXT: jae .LBB6_41
; X86-FAST-NEXT: # %bb.40:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-FAST-NEXT: orl %esi, %eax
; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_41:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: testl %ebx, %ebx
; X86-FAST-NEXT: je .LBB6_43
; X86-FAST-NEXT: # %bb.42:
; X86-FAST-NEXT: movl (%esp), %ebp # 4-byte Reload
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-FAST-NEXT: .LBB6_43:
; X86-FAST-NEXT: orl %edx, %ebp
; X86-FAST-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-FAST-NEXT: cmpl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-FAST-NEXT: je .LBB6_45
; X86-FAST-NEXT: # %bb.44:
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-FAST-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-FAST-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: .LBB6_45:
; X86-FAST-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-FAST-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-FAST-NEXT: movl %ecx, 4(%eax)
; X86-FAST-NEXT: movl %esi, (%eax)
; X86-FAST-NEXT: movl %ebp, 12(%eax)
; X86-FAST-NEXT: movl %edi, 8(%eax)
; X86-FAST-NEXT: addl $76, %esp
; X86-FAST-NEXT: popl %esi
; X86-FAST-NEXT: popl %edi
; X86-FAST-NEXT: popl %ebx
; X86-FAST-NEXT: popl %ebp
; X86-FAST-NEXT: retl $4
;
; X86-SLOW-LABEL: var_shift_i128:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: pushl %ebp
; X86-SLOW-NEXT: pushl %ebx
; X86-SLOW-NEXT: pushl %edi
; X86-SLOW-NEXT: pushl %esi
; X86-SLOW-NEXT: subl $72, %esp
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: andl $127, %eax
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %eax, %edx
; X86-SLOW-NEXT: movl %eax, %ecx
; X86-SLOW-NEXT: shrl %cl, %esi
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: leal (%edi,%edi), %ebp
; X86-SLOW-NEXT: notb %al
; X86-SLOW-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %eax, %ecx
; X86-SLOW-NEXT: shll %cl, %ebp
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SLOW-NEXT: movl %edx, %ecx
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: leal (%esi,%esi), %ebx
; X86-SLOW-NEXT: movl %eax, %ecx
; X86-SLOW-NEXT: shll %cl, %ebx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movl %edx, %ecx
; X86-SLOW-NEXT: shrl %cl, %eax
; X86-SLOW-NEXT: shrl %cl, %esi
; X86-SLOW-NEXT: testb $32, %dl
; X86-SLOW-NEXT: jne .LBB6_1
; X86-SLOW-NEXT: # %bb.2:
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X86-SLOW-NEXT: orl %edi, %ebx
; X86-SLOW-NEXT: movl %ebx, %esi
; X86-SLOW-NEXT: jmp .LBB6_3
; X86-SLOW-NEXT: .LBB6_1:
; X86-SLOW-NEXT: movl %eax, %ebp
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: .LBB6_3:
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-SLOW-NEXT: jb .LBB6_5
; X86-SLOW-NEXT: # %bb.4:
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: .LBB6_5:
; X86-SLOW-NEXT: leal (%ecx,%ecx), %esi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-SLOW-NEXT: notl %ebx
; X86-SLOW-NEXT: andl $127, %ebx
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ebx, %ecx
; X86-SLOW-NEXT: shll %cl, %esi
; X86-SLOW-NEXT: movl %eax, %ecx
; X86-SLOW-NEXT: shrl $31, %ecx
; X86-SLOW-NEXT: leal (%ecx,%edi,2), %ecx
; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ecx, %edi
; X86-SLOW-NEXT: movl %ebx, %ecx
; X86-SLOW-NEXT: shll %cl, %edi
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: testb $32, %bl
; X86-SLOW-NEXT: movl $0, %edi
; X86-SLOW-NEXT: movl $0, %ecx
; X86-SLOW-NEXT: jne .LBB6_7
; X86-SLOW-NEXT: # %bb.6:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: movl %esi, %ecx
; X86-SLOW-NEXT: .LBB6_7:
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SLOW-NEXT: movl %edi, %ecx
; X86-SLOW-NEXT: shrl $31, %ecx
; X86-SLOW-NEXT: leal (%ecx,%eax,2), %esi
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ebx, %ecx
; X86-SLOW-NEXT: shll %cl, %esi
; X86-SLOW-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF
; X86-SLOW-NEXT: movl %ebx, %ecx
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: testb $32, %bl
; X86-SLOW-NEXT: jne .LBB6_9
; X86-SLOW-NEXT: # %bb.8:
; X86-SLOW-NEXT: orl %edi, %esi
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: .LBB6_9:
; X86-SLOW-NEXT: movb %bl, %dh
; X86-SLOW-NEXT: addb $-64, %dh
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-SLOW-NEXT: movb %dh, %cl
; X86-SLOW-NEXT: shll %cl, %esi
; X86-SLOW-NEXT: testb $32, %dh
; X86-SLOW-NEXT: movl $0, %ecx
; X86-SLOW-NEXT: jne .LBB6_11
; X86-SLOW-NEXT: # %bb.10:
; X86-SLOW-NEXT: movl %esi, %ecx
; X86-SLOW-NEXT: .LBB6_11:
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: jb .LBB6_13
; X86-SLOW-NEXT: # %bb.12:
; X86-SLOW-NEXT: xorl %ebp, %ebp
; X86-SLOW-NEXT: .LBB6_13:
; X86-SLOW-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movb $64, %ch
; X86-SLOW-NEXT: movb $64, %ah
; X86-SLOW-NEXT: subb %dl, %ah
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-SLOW-NEXT: movb %ah, %cl
; X86-SLOW-NEXT: shll %cl, %ebp
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: movl %esi, %edi
; X86-SLOW-NEXT: shrl %edi
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: movb %ah, %cl
; X86-SLOW-NEXT: shll %cl, %esi
; X86-SLOW-NEXT: testb $32, %ah
; X86-SLOW-NEXT: jne .LBB6_14
; X86-SLOW-NEXT: # %bb.15:
; X86-SLOW-NEXT: orl %edi, %ebp
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %ebp, %esi
; X86-SLOW-NEXT: jmp .LBB6_16
; X86-SLOW-NEXT: .LBB6_14:
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: .LBB6_16:
; X86-SLOW-NEXT: addb $-64, %dl
; X86-SLOW-NEXT: movb %dl, %cl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shrl %cl, %eax
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-SLOW-NEXT: shll %cl, %ebp
; X86-SLOW-NEXT: movb %dl, %cl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: testb $32, %dl
; X86-SLOW-NEXT: jne .LBB6_17
; X86-SLOW-NEXT: # %bb.18:
; X86-SLOW-NEXT: orl %eax, %ebp
; X86-SLOW-NEXT: cmpl $64, %ebx
; X86-SLOW-NEXT: jae .LBB6_20
; X86-SLOW-NEXT: jmp .LBB6_21
; X86-SLOW-NEXT: .LBB6_17:
; X86-SLOW-NEXT: movl %edi, %ebp
; X86-SLOW-NEXT: xorl %edi, %edi
; X86-SLOW-NEXT: cmpl $64, %ebx
; X86-SLOW-NEXT: jb .LBB6_21
; X86-SLOW-NEXT: .LBB6_20:
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-SLOW-NEXT: .LBB6_21:
; X86-SLOW-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-SLOW-NEXT: jae .LBB6_23
; X86-SLOW-NEXT: # %bb.22:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: orl %esi, %edi
; X86-SLOW-NEXT: .LBB6_23:
; X86-SLOW-NEXT: cmpl $64, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: jb .LBB6_24
; X86-SLOW-NEXT: # %bb.25:
; X86-SLOW-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: jmp .LBB6_26
; X86-SLOW-NEXT: .LBB6_24:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: .LBB6_26:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shrl $31, %eax
; X86-SLOW-NEXT: leal (%eax,%esi,2), %esi
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movb %bl, %cl
; X86-SLOW-NEXT: shll %cl, %esi
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: shrl %edi
; X86-SLOW-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
; X86-SLOW-NEXT: shrl %cl, %edi
; X86-SLOW-NEXT: testb $32, %bl
; X86-SLOW-NEXT: jne .LBB6_28
; X86-SLOW-NEXT: # %bb.27:
; X86-SLOW-NEXT: orl %edi, %esi
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: .LBB6_28:
; X86-SLOW-NEXT: movl %ebp, %eax
; X86-SLOW-NEXT: movb %dh, %cl
; X86-SLOW-NEXT: shll %cl, %eax
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-SLOW-NEXT: shrl %cl, %esi
; X86-SLOW-NEXT: testb $32, %dh
; X86-SLOW-NEXT: jne .LBB6_30
; X86-SLOW-NEXT: # %bb.29:
; X86-SLOW-NEXT: orl %esi, %eax
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: .LBB6_30:
; X86-SLOW-NEXT: subb %bl, %ch
; X86-SLOW-NEXT: movl %ebp, %eax
; X86-SLOW-NEXT: movb %ch, %cl
; X86-SLOW-NEXT: shrl %cl, %eax
; X86-SLOW-NEXT: addl %ebp, %ebp
; X86-SLOW-NEXT: notb %cl
; X86-SLOW-NEXT: shll %cl, %ebp
; X86-SLOW-NEXT: movb %ch, %cl
; X86-SLOW-NEXT: movl %ebp, %esi
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-SLOW-NEXT: shrl %cl, %ebp
; X86-SLOW-NEXT: testb $32, %ch
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: jne .LBB6_31
; X86-SLOW-NEXT: # %bb.32:
; X86-SLOW-NEXT: orl %ebp, %esi
; X86-SLOW-NEXT: movl %esi, %ebp
; X86-SLOW-NEXT: cmpl $64, %ebx
; X86-SLOW-NEXT: jb .LBB6_34
; X86-SLOW-NEXT: jmp .LBB6_35
; X86-SLOW-NEXT: .LBB6_31:
; X86-SLOW-NEXT: movl %eax, %ebp
; X86-SLOW-NEXT: xorl %eax, %eax
; X86-SLOW-NEXT: cmpl $64, %ebx
; X86-SLOW-NEXT: jae .LBB6_35
; X86-SLOW-NEXT: .LBB6_34:
; X86-SLOW-NEXT: movl %ebp, %esi
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-SLOW-NEXT: orl %eax, %ebp
; X86-SLOW-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %esi, %ebp
; X86-SLOW-NEXT: .LBB6_35:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-SLOW-NEXT: cmpl $64, %ebx
; X86-SLOW-NEXT: jae .LBB6_37
; X86-SLOW-NEXT: # %bb.36:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-SLOW-NEXT: orl %ebp, %eax
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: .LBB6_37:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: testl %ebx, %ebx
; X86-SLOW-NEXT: je .LBB6_39
; X86-SLOW-NEXT: # %bb.38:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-SLOW-NEXT: .LBB6_39:
; X86-SLOW-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-SLOW-NEXT: cmpl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-SLOW-NEXT: je .LBB6_41
; X86-SLOW-NEXT: # %bb.40:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-SLOW-NEXT: .LBB6_41:
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-SLOW-NEXT: orl %ecx, %ebx
; X86-SLOW-NEXT: orl %ebp, %edx
; X86-SLOW-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-SLOW-NEXT: movl %ebx, (%eax)
; X86-SLOW-NEXT: movl %esi, 12(%eax)
; X86-SLOW-NEXT: movl %edx, 4(%eax)
; X86-SLOW-NEXT: movl %edi, 8(%eax)
; X86-SLOW-NEXT: addl $72, %esp
; X86-SLOW-NEXT: popl %esi
; X86-SLOW-NEXT: popl %edi
; X86-SLOW-NEXT: popl %ebx
; X86-SLOW-NEXT: popl %ebp
; X86-SLOW-NEXT: retl $4
;
; X64-FAST-LABEL: var_shift_i128:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movq %r8, %r10
; X64-FAST-NEXT: movq %rcx, %r9
; X64-FAST-NEXT: movq %rdx, %r8
; X64-FAST-NEXT: movq %rsi, %rdx
; X64-FAST-NEXT: movl %r10d, %ecx
; X64-FAST-NEXT: shrdq %cl, %r9, %r8
; X64-FAST-NEXT: shrq %cl, %r9
; X64-FAST-NEXT: xorl %eax, %eax
; X64-FAST-NEXT: testb $64, %r10b
; X64-FAST-NEXT: cmovneq %r9, %r8
; X64-FAST-NEXT: cmovneq %rax, %r9
; X64-FAST-NEXT: shldq $1, %rdi, %rdx
; X64-FAST-NEXT: addq %rdi, %rdi
; X64-FAST-NEXT: notb %r10b
; X64-FAST-NEXT: movl %r10d, %ecx
; X64-FAST-NEXT: shldq %cl, %rdi, %rdx
; X64-FAST-NEXT: shlq %cl, %rdi
; X64-FAST-NEXT: testb $64, %r10b
; X64-FAST-NEXT: cmovneq %rdi, %rdx
; X64-FAST-NEXT: cmoveq %rdi, %rax
; X64-FAST-NEXT: orq %r8, %rax
; X64-FAST-NEXT: orq %r9, %rdx
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: var_shift_i128:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: movq %rcx, %r9
; X64-SLOW-NEXT: movq %rdx, %r10
; X64-SLOW-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
; X64-SLOW-NEXT: andq %rdi, %rax
; X64-SLOW-NEXT: movl %r8d, %ecx
; X64-SLOW-NEXT: shrq %cl, %rax
; X64-SLOW-NEXT: movq %rdi, %rcx
; X64-SLOW-NEXT: shrq $63, %rcx
; X64-SLOW-NEXT: leaq (%rcx,%rsi,2), %rdx
; X64-SLOW-NEXT: movl %r8d, %r11d
; X64-SLOW-NEXT: notb %r11b
; X64-SLOW-NEXT: movl %r11d, %ecx
; X64-SLOW-NEXT: shlq %cl, %rdx
; X64-SLOW-NEXT: orq %rax, %rdx
; X64-SLOW-NEXT: movl %r8d, %ecx
; X64-SLOW-NEXT: shrq %cl, %r10
; X64-SLOW-NEXT: leaq (%r9,%r9), %rsi
; X64-SLOW-NEXT: movl %r11d, %ecx
; X64-SLOW-NEXT: shlq %cl, %rsi
; X64-SLOW-NEXT: orq %r10, %rsi
; X64-SLOW-NEXT: movl %r8d, %ecx
; X64-SLOW-NEXT: shrq %cl, %r9
; X64-SLOW-NEXT: xorl %eax, %eax
; X64-SLOW-NEXT: testb $64, %r8b
; X64-SLOW-NEXT: cmovneq %r9, %rsi
; X64-SLOW-NEXT: cmovneq %rax, %r9
; X64-SLOW-NEXT: addq %rdi, %rdi
; X64-SLOW-NEXT: movl %r11d, %ecx
; X64-SLOW-NEXT: shlq %cl, %rdi
; X64-SLOW-NEXT: testb $64, %r11b
; X64-SLOW-NEXT: cmovneq %rdi, %rdx
; X64-SLOW-NEXT: cmoveq %rdi, %rax
; X64-SLOW-NEXT: orq %rsi, %rax
; X64-SLOW-NEXT: orq %r9, %rdx
; X64-SLOW-NEXT: retq
%tmp = tail call i128 @llvm.fshr.i128(i128 %x, i128 %y, i128 %z)
ret i128 %tmp
}
;
; Const Funnel Shift
;
define i8 @const_shift_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: const_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb $7, %cl
; X86-NEXT: addb %al, %al
; X86-NEXT: orb %cl, %al
; X86-NEXT: retl
;
; X64-LABEL: const_shift_i8:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: shrb $7, %sil
; X64-NEXT: leal (%rdi,%rdi), %eax
; X64-NEXT: orb %sil, %al
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%tmp = tail call i8 @llvm.fshr.i8(i8 %x, i8 %y, i8 7)
ret i8 %tmp
}
define i16 @const_shift_i16(i16 %x, i16 %y) nounwind {
; X86-FAST-LABEL: const_shift_i16:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdw $7, %cx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: const_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: shrl $7, %ecx
; X86-SLOW-NEXT: shll $9, %eax
; X86-SLOW-NEXT: orl %ecx, %eax
; X86-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: const_shift_i16:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movl %esi, %eax
; X64-FAST-NEXT: shrdw $7, %di, %ax
; X64-FAST-NEXT: # kill: def $ax killed $ax killed $eax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: const_shift_i16:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: movzwl %si, %eax
; X64-SLOW-NEXT: shll $9, %edi
; X64-SLOW-NEXT: shrl $7, %eax
; X64-SLOW-NEXT: orl %edi, %eax
; X64-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
; X64-SLOW-NEXT: retq
%tmp = tail call i16 @llvm.fshr.i16(i16 %x, i16 %y, i16 7)
ret i16 %tmp
}
define i32 @const_shift_i32(i32 %x, i32 %y) nounwind {
; X86-FAST-LABEL: const_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl $7, %ecx, %eax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: const_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: shrl $7, %ecx
; X86-SLOW-NEXT: shll $25, %eax
; X86-SLOW-NEXT: orl %ecx, %eax
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: const_shift_i32:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movl %edi, %eax
; X64-FAST-NEXT: shldl $25, %esi, %eax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: const_shift_i32:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: # kill: def $esi killed $esi def $rsi
; X64-SLOW-NEXT: # kill: def $edi killed $edi def $rdi
; X64-SLOW-NEXT: shrl $7, %esi
; X64-SLOW-NEXT: shll $25, %edi
; X64-SLOW-NEXT: leal (%rdi,%rsi), %eax
; X64-SLOW-NEXT: retq
%tmp = tail call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 7)
ret i32 %tmp
}
define i64 @const_shift_i64(i64 %x, i64 %y) nounwind {
; X86-FAST-LABEL: const_shift_i64:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: shldl $25, %ecx, %edx
; X86-FAST-NEXT: shrdl $7, %ecx, %eax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: const_shift_i64:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: pushl %esi
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-SLOW-NEXT: shrl $7, %ecx
; X86-SLOW-NEXT: movl %esi, %eax
; X86-SLOW-NEXT: shll $25, %eax
; X86-SLOW-NEXT: orl %ecx, %eax
; X86-SLOW-NEXT: shrl $7, %esi
; X86-SLOW-NEXT: shll $25, %edx
; X86-SLOW-NEXT: orl %esi, %edx
; X86-SLOW-NEXT: popl %esi
; X86-SLOW-NEXT: retl
;
; X64-FAST-LABEL: const_shift_i64:
; X64-FAST: # %bb.0:
; X64-FAST-NEXT: movq %rdi, %rax
; X64-FAST-NEXT: shldq $57, %rsi, %rax
; X64-FAST-NEXT: retq
;
; X64-SLOW-LABEL: const_shift_i64:
; X64-SLOW: # %bb.0:
; X64-SLOW-NEXT: shrq $7, %rsi
; X64-SLOW-NEXT: shlq $57, %rdi
; X64-SLOW-NEXT: leaq (%rdi,%rsi), %rax
; X64-SLOW-NEXT: retq
%tmp = tail call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 7)
ret i64 %tmp
}
;
; Combine Consecutive Loads
;
define i8 @combine_fshr_load_i8(i8* %p) nounwind {
; X86-LABEL: combine_fshr_load_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i8:
; X64: # %bb.0:
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: retq
%p1 = getelementptr i8, i8* %p, i32 1
%ld0 = load i8, i8 *%p
%ld1 = load i8, i8 *%p1
%res = call i8 @llvm.fshr.i8(i8 %ld1, i8 %ld0, i8 8)
ret i8 %res
}
define i16 @combine_fshr_load_i16(i16* %p) nounwind {
; X86-LABEL: combine_fshr_load_i16:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl 1(%eax), %eax
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i16:
; X64: # %bb.0:
; X64-NEXT: movzwl 1(%rdi), %eax
; X64-NEXT: retq
%p0 = getelementptr i16, i16* %p, i32 0
%p1 = getelementptr i16, i16* %p, i32 1
%ld0 = load i16, i16 *%p0
%ld1 = load i16, i16 *%p1
%res = call i16 @llvm.fshr.i16(i16 %ld1, i16 %ld0, i16 8)
ret i16 %res
}
define i32 @combine_fshr_load_i32(i32* %p) nounwind {
; X86-LABEL: combine_fshr_load_i32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl 9(%eax), %eax
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i32:
; X64: # %bb.0:
; X64-NEXT: movl 9(%rdi), %eax
; X64-NEXT: retq
%p0 = getelementptr i32, i32* %p, i32 2
%p1 = getelementptr i32, i32* %p, i32 3
%ld0 = load i32, i32 *%p0
%ld1 = load i32, i32 *%p1
%res = call i32 @llvm.fshr.i32(i32 %ld1, i32 %ld0, i32 8)
ret i32 %res
}
define i64 @combine_fshr_load_i64(i64* %p) nounwind {
; X86-LABEL: combine_fshr_load_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl 11(%ecx), %eax
; X86-NEXT: movl 15(%ecx), %edx
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i64:
; X64: # %bb.0:
; X64-NEXT: movq 11(%rdi), %rax
; X64-NEXT: retq
%p0 = getelementptr i64, i64* %p, i64 1
%p1 = getelementptr i64, i64* %p, i64 2
%ld0 = load i64, i64 *%p0
%ld1 = load i64, i64 *%p1
%res = call i64 @llvm.fshr.i64(i64 %ld1, i64 %ld0, i64 24)
ret i64 %res
}
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
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