Krasimir Georgiev 685f1bfd0a Revert "[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns" ...

It appears to cause stage2 clang build failures, e.g.,
https://lab.llvm.org/buildbot/#/builders/74/builds/7145.

This reverts commit 1fb37334bd.

2021-10-01 11:39:43 +02:00

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aarch64-predication.ll

[LV] Mark increment of main vector loop induction variable as NUW.

2021-06-07 10:47:52 +01:00

aarch64-unroll.ll

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arbitrary-induction-step.ll

[LV] Mark increment of main vector loop induction variable as NUW.

2021-06-07 10:47:52 +01:00

arm64-unroll.ll

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backedge-overflow.ll

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deterministic-type-shrinkage.ll

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eliminate-tail-predication.ll

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extend-vectorization-factor-for-unprofitable-memops.ll

[AArch64] Cost-model i8 vector loads/stores

2021-07-05 11:25:10 +01:00

extractvalue-no-scalarization-required.ll

[LV] Consider ExtractValue as uniform.

2021-08-05 16:20:50 +01:00

first-order-recurrence.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

gather-cost.ll

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induction-trunc.ll

[LV] Mark increment of main vector loop induction variable as NUW.

2021-06-07 10:47:52 +01:00

interleaved_cost.ll

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interleaved-store-of-first-order-recurrence.ll

[LV] Add test to store a first-order rec via interleave group.

2021-07-26 15:20:04 +01:00

interleaved-vs-scalar.ll

[AArch64] Cost-model i8 vector loads/stores

2021-07-05 11:25:10 +01:00

intrinsiccost.ll

[CostModel] Update default cost model for sadd/ssub overflow to match TargetLowering

2021-09-30 09:41:14 -07:00

lit.local.cfg

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loop-vectorization-factors.ll

[LV] Mark increment of main vector loop induction variable as NUW.

2021-06-07 10:47:52 +01:00

loopvectorize_pr33804_double.ll

Revert "[NFC] remove explicit default value for strboolattr attribute in tests"

2021-05-24 19:43:40 +02:00

masked-op-cost.ll

[LV] Build and cost VPlans for scalable VFs.

2021-06-02 14:47:47 +01:00

max-vf-for-interleaved.ll

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no_vector_instructions.ll

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nontemporal-load-store.ll

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outer_loop_test1_no_explicit_vect_width.ll

[LV] Mark increment of main vector loop induction variable as NUW.

2021-06-07 10:47:52 +01:00

Oz-and-forced-vectorize.ll

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pr31900.ll

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pr33053.ll

Revert "[NFC] remove explicit default value for strboolattr attribute in tests"

2021-05-24 19:43:40 +02:00

pr36032.ll

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pr46950-load-cast-context-crash.ll

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predication_costs.ll

[LV] Don't assume isScalarAfterVectorization if one of the uses needs widening.

2021-07-26 16:01:55 +01:00

reduction-small-size.ll

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runtime-check-size-based-threshold.ll

[LV] Add tests where rt checks may make vectorization unprofitable.

2021-09-27 10:32:28 +01:00

scalable-alloca.ll

[LV] Avoid scalable vectorization for loops containing alloca

2021-07-16 11:47:13 +01:00

scalable-call.ll

[LV] Don't let ForceTargetInstructionCost override Invalid cost.

2021-07-26 20:27:49 +01:00

scalable-predicate-instruction.ll

[LoopVectorize] Fix crash for predicated instruction with scalable VF

2021-07-22 12:48:27 +01:00

scalable-reductions.ll

[LV] Prevent vectorization with unsupported element types.

2021-07-06 13:06:21 +01:00

scalable-strict-fadd.ll

Recommit "[LoopVectorize][AArch64] Enable ordered reductions by default for AArch64"

2021-08-23 11:25:27 +01:00

scalable-vectorization.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

scalable-vf-hint.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

scalarize-store-with-predication.ll

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sdiv-pow2.ll

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select-costs.ll

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smallest-and-widest-types.ll

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strict-fadd-cost.ll

[Analysis][AArch64] Make fixed-width ordered reductions slightly more expensive

2021-08-18 17:01:56 +01:00

strict-fadd-vf1.ll

[NFC] Rename enable-strict-reductions to force-ordered-reductions

2021-08-03 09:33:01 +01:00

strict-fadd.ll

Recommit "[LoopVectorize][AArch64] Enable ordered reductions by default for AArch64"

2021-08-23 11:25:27 +01:00

sve-basic-vec.ll

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sve-cond-inv-loads.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

sve-extract-last-veclane.ll

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sve-gather-scatter.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

sve-illegal-type.ll

[LV] Prevent vectorization with unsupported element types.

2021-07-06 13:06:21 +01:00

sve-inductions.ll

[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.

2021-07-26 20:27:48 +01:00

sve-inv-loads.ll

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sve-inv-store.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

sve-large-strides.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

sve-masked-loadstore.ll

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sve-scalable-load-in-loop.ll

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sve-strict-fadd-cost.ll

[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute

2021-08-17 14:42:47 +01:00

sve-tail-folding.ll

[LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.

2021-07-27 11:37:21 +01:00

sve-type-conv.ll

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sve-vector-reverse-mask4.ll

[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses

2021-09-20 18:32:24 -07:00

sve-vector-reverse.ll

[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses

2021-09-20 18:32:24 -07:00

sve-widen-extractvalue.ll

[LV] Consider ExtractValue as uniform.

2021-08-05 16:20:50 +01:00

sve-widen-gep.ll

[SVE][LoopVectorize] Optimise code generated by widenPHIInstruction

2021-09-10 11:58:04 +01:00

sve-widen-phi.ll

[Analysis] Add support for vscale in computeKnownBitsFromOperator

2021-09-20 15:01:59 +01:00

type-shrinkage-insertelt.ll

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unsafe-vf-hint-remark.ll

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veclib-calls-libsystem-darwin.ll

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vector-reverse-mask4.ll

Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069)

2021-08-23 21:09:26 +01:00

vector-reverse.ll

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