778cf5431c
These are essentially add/sub 1 with a clamping value. AMDGPU has instructions for these. CUDA/HIP expose these as atomicInc/atomicDec. Currently we use target intrinsics for these, but those do no carry the ordering and syncscope. Add these to atomicrmw so we can carry these and benefit from the regular legalization processes.
75 lines
3.5 KiB
LLVM
75 lines
3.5 KiB
LLVM
; RUN: opt < %s | opt -S | FileCheck %s
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; RUN: verify-uselistorder %s
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; Basic smoke test for atomic operations.
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define void @f(ptr %x) {
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; CHECK: load atomic i32, ptr %x unordered, align 4
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load atomic i32, ptr %x unordered, align 4
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; CHECK: load atomic volatile i32, ptr %x syncscope("singlethread") acquire, align 4
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load atomic volatile i32, ptr %x syncscope("singlethread") acquire, align 4
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; CHECK: load atomic volatile i32, ptr %x syncscope("agent") acquire, align 4
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load atomic volatile i32, ptr %x syncscope("agent") acquire, align 4
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; CHECK: store atomic i32 3, ptr %x release, align 4
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store atomic i32 3, ptr %x release, align 4
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; CHECK: store atomic volatile i32 3, ptr %x syncscope("singlethread") monotonic, align 4
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store atomic volatile i32 3, ptr %x syncscope("singlethread") monotonic, align 4
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; CHECK: store atomic volatile i32 3, ptr %x syncscope("workgroup") monotonic, align 4
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store atomic volatile i32 3, ptr %x syncscope("workgroup") monotonic, align 4
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; CHECK: cmpxchg ptr %x, i32 1, i32 0 syncscope("singlethread") monotonic monotonic
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cmpxchg ptr %x, i32 1, i32 0 syncscope("singlethread") monotonic monotonic
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; CHECK: cmpxchg ptr %x, i32 1, i32 0 syncscope("workitem") monotonic monotonic
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cmpxchg ptr %x, i32 1, i32 0 syncscope("workitem") monotonic monotonic
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; CHECK: cmpxchg volatile ptr %x, i32 0, i32 1 acq_rel acquire
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cmpxchg volatile ptr %x, i32 0, i32 1 acq_rel acquire
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; CHECK: cmpxchg ptr %x, i32 42, i32 0 acq_rel monotonic
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cmpxchg ptr %x, i32 42, i32 0 acq_rel monotonic
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; CHECK: cmpxchg weak ptr %x, i32 13, i32 0 seq_cst monotonic
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cmpxchg weak ptr %x, i32 13, i32 0 seq_cst monotonic
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; CHECK: atomicrmw add ptr %x, i32 10 seq_cst
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atomicrmw add ptr %x, i32 10 seq_cst
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; CHECK: atomicrmw volatile xchg ptr %x, i32 10 monotonic
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atomicrmw volatile xchg ptr %x, i32 10 monotonic
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; CHECK: atomicrmw volatile xchg ptr %x, i32 10 syncscope("agent") monotonic
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atomicrmw volatile xchg ptr %x, i32 10 syncscope("agent") monotonic
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; CHECK: atomicrmw volatile uinc_wrap ptr %x, i32 10 monotonic
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atomicrmw volatile uinc_wrap ptr %x, i32 10 monotonic
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; CHECK: atomicrmw volatile uinc_wrap ptr %x, i32 10 syncscope("agent") monotonic
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atomicrmw volatile uinc_wrap ptr %x, i32 10 syncscope("agent") monotonic
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; CHECK: atomicrmw volatile udec_wrap ptr %x, i32 10 monotonic
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atomicrmw volatile udec_wrap ptr %x, i32 10 monotonic
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; CHECK: atomicrmw volatile udec_wrap ptr %x, i32 10 syncscope("agent") monotonic
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atomicrmw volatile udec_wrap ptr %x, i32 10 syncscope("agent") monotonic
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; CHECK: fence syncscope("singlethread") release
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fence syncscope("singlethread") release
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; CHECK: fence seq_cst
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fence seq_cst
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; CHECK: fence syncscope("device") seq_cst
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fence syncscope("device") seq_cst
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ret void
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}
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define void @fp_atomics(ptr %x) {
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; CHECK: atomicrmw fadd ptr %x, float 1.000000e+00 seq_cst
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atomicrmw fadd ptr %x, float 1.0 seq_cst
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; CHECK: atomicrmw volatile fadd ptr %x, float 1.000000e+00 seq_cst
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atomicrmw volatile fadd ptr %x, float 1.0 seq_cst
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; CHECK: atomicrmw fmax ptr %x, float 1.000000e+00 seq_cst
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atomicrmw fmax ptr %x, float 1.0 seq_cst
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; CHECK: atomicrmw volatile fmax ptr %x, float 1.000000e+00 seq_cst
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atomicrmw volatile fmax ptr %x, float 1.0 seq_cst
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; CHECK: atomicrmw fmin ptr %x, float 1.000000e+00 seq_cst
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atomicrmw fmin ptr %x, float 1.0 seq_cst
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; CHECK: atomicrmw volatile fmin ptr %x, float 1.000000e+00 seq_cst
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atomicrmw volatile fmin ptr %x, float 1.0 seq_cst
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ret void
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}
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