d9962c400f
This flag indicates that every bit is known to be zero in at least one of the inputs. This allows the Or to be treated as an Add since there is no possibility of a carry from any bit. If the flag is present and this property does not hold, the result is poison. This makes it easier to reverse the InstCombine transform that turns Add into Or. This is inspired by a comment here https://github.com/llvm/llvm-project/pull/71955#discussion_r1391614578 Discourse thread https://discourse.llvm.org/t/rfc-add-or-disjoint-flag/75036
264 lines
6.2 KiB
LLVM
264 lines
6.2 KiB
LLVM
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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; RUN: verify-uselistorder %s
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@addr = external global i64
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define i64 @add_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = add nuw i64 %x, %y
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%z = add nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw i64 %x, %y
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%z = sub nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_unsigned(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw i64 %x, %y
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%z = mul nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_signed(i64 %x, i64 %y) {
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; CHECK: %z = add nsw i64 %x, %y
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%z = add nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_signed(i64 %x, i64 %y) {
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; CHECK: %z = sub nsw i64 %x, %y
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%z = sub nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_signed(i64 %x, i64 %y) {
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; CHECK: %z = mul nsw i64 %x, %y
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%z = mul nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_plain(i64 %x, i64 %y) {
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; CHECK: %z = add i64 %x, %y
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%z = add i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_plain(i64 %x, i64 %y) {
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; CHECK: %z = sub i64 %x, %y
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%z = sub i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_plain(i64 %x, i64 %y) {
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; CHECK: %z = mul i64 %x, %y
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%z = mul i64 %x, %y
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ret i64 %z
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}
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define i64 @add_both(i64 %x, i64 %y) {
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; CHECK: %z = add nuw nsw i64 %x, %y
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%z = add nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_both(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw nsw i64 %x, %y
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%z = sub nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_both(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw nsw i64 %x, %y
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%z = mul nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @add_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = add nuw nsw i64 %x, %y
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%z = add nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @sub_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = sub nuw nsw i64 %x, %y
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%z = sub nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @mul_both_reversed(i64 %x, i64 %y) {
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; CHECK: %z = mul nuw nsw i64 %x, %y
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%z = mul nsw nuw i64 %x, %y
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ret i64 %z
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}
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define i64 @shl_both(i64 %x, i64 %y) {
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; CHECK: %z = shl nuw nsw i64 %x, %y
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%z = shl nuw nsw i64 %x, %y
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ret i64 %z
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}
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define i64 @sdiv_exact(i64 %x, i64 %y) {
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; CHECK: %z = sdiv exact i64 %x, %y
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%z = sdiv exact i64 %x, %y
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ret i64 %z
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}
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define i64 @sdiv_plain(i64 %x, i64 %y) {
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; CHECK: %z = sdiv i64 %x, %y
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%z = sdiv i64 %x, %y
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ret i64 %z
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}
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define i64 @udiv_exact(i64 %x, i64 %y) {
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; CHECK: %z = udiv exact i64 %x, %y
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%z = udiv exact i64 %x, %y
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ret i64 %z
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}
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define i64 @udiv_plain(i64 %x, i64 %y) {
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; CHECK: %z = udiv i64 %x, %y
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%z = udiv i64 %x, %y
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ret i64 %z
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}
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define i64 @ashr_plain(i64 %x, i64 %y) {
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; CHECK: %z = ashr i64 %x, %y
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%z = ashr i64 %x, %y
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ret i64 %z
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}
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define i64 @ashr_exact(i64 %x, i64 %y) {
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; CHECK: %z = ashr exact i64 %x, %y
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%z = ashr exact i64 %x, %y
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ret i64 %z
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}
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define i64 @lshr_plain(i64 %x, i64 %y) {
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; CHECK: %z = lshr i64 %x, %y
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%z = lshr i64 %x, %y
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ret i64 %z
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}
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define i64 @lshr_exact(i64 %x, i64 %y) {
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; CHECK: %z = lshr exact i64 %x, %y
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%z = lshr exact i64 %x, %y
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ret i64 %z
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}
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define ptr @gep_nw(ptr %p, i64 %x) {
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; CHECK: %z = getelementptr inbounds i64, ptr %p, i64 %x
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%z = getelementptr inbounds i64, ptr %p, i64 %x
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ret ptr %z
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}
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define ptr @gep_plain(ptr %p, i64 %x) {
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; CHECK: %z = getelementptr i64, ptr %p, i64 %x
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%z = getelementptr i64, ptr %p, i64 %x
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ret ptr %z
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}
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define i64 @add_both_ce() {
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; CHECK: ret i64 add nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 add nsw nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @sub_both_ce() {
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; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 sub nsw nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @mul_both_ce() {
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; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 mul nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define ptr @gep_nw_ce() {
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; CHECK: ret ptr getelementptr inbounds (i64, ptr @addr, i64 171)
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ret ptr getelementptr inbounds (i64, ptr @addr, i64 171)
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}
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define i64 @add_plain_ce() {
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; CHECK: ret i64 add (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 add (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @sub_plain_ce() {
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; CHECK: ret i64 sub (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 sub (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @mul_plain_ce() {
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; CHECK: ret i64 mul (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 mul (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define ptr @gep_plain_ce() {
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; CHECK: ret ptr getelementptr (i64, ptr @addr, i64 171)
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ret ptr getelementptr (i64, ptr @addr, i64 171)
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}
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define i64 @add_both_reversed_ce() {
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; CHECK: ret i64 add nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 add nsw nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @sub_both_reversed_ce() {
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; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 sub nsw nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @mul_both_reversed_ce() {
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; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 mul nsw nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @add_signed_ce() {
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; CHECK: ret i64 add nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 add nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @sub_signed_ce() {
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; CHECK: ret i64 sub nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 sub nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @mul_signed_ce() {
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; CHECK: ret i64 mul nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 mul nsw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @shl_signed_ce() {
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; CHECK: ret i64 shl nsw (i64 ptrtoint (ptr @addr to i64), i64 17)
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ret i64 shl nsw (i64 ptrtoint (ptr @addr to i64), i64 17)
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}
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define i64 @add_unsigned_ce() {
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; CHECK: ret i64 add nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 add nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @sub_unsigned_ce() {
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; CHECK: ret i64 sub nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 sub nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @mul_unsigned_ce() {
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; CHECK: ret i64 mul nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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ret i64 mul nuw (i64 ptrtoint (ptr @addr to i64), i64 91)
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}
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define i64 @test_zext(i32 %a) {
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; CHECK: %res = zext nneg i32 %a to i64
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%res = zext nneg i32 %a to i64
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ret i64 %res
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}
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define i64 @test_or(i64 %a, i64 %b) {
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; CHECK: %res = or disjoint i64 %a, %b
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%res = or disjoint i64 %a, %b
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ret i64 %res
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}
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