e39f6c1844
There are many tests that specify a target triple/CPU flags but no DataLayout which can lead to IR being generated that has unusual behaviour. This commit attempts to use the default DataLayout based on the relevant flags if there is no explicit override on the command line or in the IR file. One thing that is not currently possible to differentiate from a missing datalayout `target datalayout = ""` in the IR file since the current APIs don't allow detecting this case. If it is considered useful to support this case (instead of passing "-data-layout=" on the command line), I can change IR parsers to track whether they have seen such a directive and change the callback type. Differential Revision: https://reviews.llvm.org/D141060
172 lines
5.4 KiB
LLVM
172 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -S -codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
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define i64 @no_sink_local_to_flat(i1 %pred, ptr addrspace(3) %ptr) {
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; CHECK-LABEL: define i64 @no_sink_local_to_flat(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr addrspace(3) [[PTR:%.*]]) {
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; CHECK-NEXT: [[PTR_CAST:%.*]] = addrspacecast ptr addrspace(3) [[PTR]] to ptr
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr addrspace(3) [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[PTR_CAST]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr addrspace(3) %ptr to ptr
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr addrspace(3) %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr %ptr_cast
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ret i64 %v2
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}
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define i64 @no_sink_private_to_flat(i1 %pred, ptr addrspace(5) %ptr) {
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; CHECK-LABEL: define i64 @no_sink_private_to_flat(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr addrspace(5) [[PTR:%.*]]) {
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; CHECK-NEXT: [[PTR_CAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr addrspace(5) [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[PTR_CAST]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr addrspace(5) %ptr to ptr
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr addrspace(5) %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr %ptr_cast
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ret i64 %v2
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}
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define i64 @sink_global_to_flat(i1 %pred, ptr addrspace(1) %ptr) {
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; CHECK-LABEL: define i64 @sink_global_to_flat(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr addrspace(1) [[PTR:%.*]]) {
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr addrspace(1) [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(1) [[PTR]] to ptr
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[TMP1]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr addrspace(1) %ptr to ptr
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr addrspace(1) %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr %ptr_cast
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ret i64 %v2
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}
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define i64 @sink_flat_to_global(i1 %pred, ptr %ptr) {
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; CHECK-LABEL: define i64 @sink_flat_to_global(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr [[PTR:%.*]]) {
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[PTR]] to ptr addrspace(1)
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr addrspace(1) [[TMP1]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr %ptr to ptr addrspace(1)
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr addrspace(1) %ptr_cast
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ret i64 %v2
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}
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define i64 @sink_flat_to_constant(i1 %pred, ptr %ptr) {
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; CHECK-LABEL: define i64 @sink_flat_to_constant(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr [[PTR:%.*]]) {
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[PTR]] to ptr addrspace(4)
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr addrspace(4) [[TMP1]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr %ptr to ptr addrspace(4)
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr addrspace(4) %ptr_cast
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ret i64 %v2
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}
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define i64 @sink_flat_to_local(i1 %pred, ptr %ptr) {
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; CHECK-LABEL: define i64 @sink_flat_to_local(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[PTR_CAST:%.*]] = addrspacecast ptr [[PTR]] to ptr addrspace(3)
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr addrspace(3) [[PTR_CAST]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr %ptr to ptr addrspace(3)
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr addrspace(3) %ptr_cast
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ret i64 %v2
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}
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define i64 @sink_flat_to_private(i1 %pred, ptr %ptr) {
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; CHECK-LABEL: define i64 @sink_flat_to_private(
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; CHECK-SAME: i1 [[PRED:%.*]], ptr [[PTR:%.*]]) {
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; CHECK-NEXT: [[PTR_CAST:%.*]] = addrspacecast ptr [[PTR]] to ptr addrspace(5)
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; CHECK-NEXT: br i1 [[PRED]], label [[L1:%.*]], label [[L2:%.*]]
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; CHECK: l1:
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[PTR]], align 8
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; CHECK-NEXT: ret i64 [[V1]]
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; CHECK: l2:
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr addrspace(5) [[PTR_CAST]], align 8
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; CHECK-NEXT: ret i64 [[V2]]
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;
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%ptr_cast = addrspacecast ptr %ptr to ptr addrspace(5)
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br i1 %pred, label %l1, label %l2
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l1:
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%v1 = load i64, ptr %ptr
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ret i64 %v1
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l2:
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%v2 = load i64, ptr addrspace(5) %ptr_cast
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ret i64 %v2
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}
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