a701b7e368
Before elimination of mostly empty block it makes sense to remove dead PHI nodes. It open more opportunity for elimination plus eliminates dead code itself. It appeared that change results in failing many unit tests and some of them I've updated and for another one I disable this optimization. The pattern I observed in the tests is that there is a infinite loop without side effects. As a result after elimination of dead phi node all other related instruction are also removed and tests stops to check what it is expected. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D158503
157 lines
4.5 KiB
LLVM
157 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
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define i32 @test1(ptr %d) nounwind {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[D:%.*]], align 1
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[L]], 0
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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entry:
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%l = load i8, ptr %d
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%cmp = icmp eq i8 %l, 0
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br i1 %cmp, label %exit, label %if.end
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if.end:
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%gep = getelementptr i8, ptr %d, i32 42
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%call = call i64 @foo(ptr %gep) nounwind readonly willreturn
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%cmp2 = icmp ne i64 %call, 0
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call void @llvm.assume(i1 %cmp2)
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br label %exit
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exit:
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test2(i32 %N) nounwind {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[IV]]
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;
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entry:
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br label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.inc, %header]
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%iv2 = phi i32 [0, %entry], [%iv2.inc, %header]
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%iv.inc = add i32 %iv, 1
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%iv2.inc = add i32 %iv2, 1
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%cmp = icmp eq i32 %iv, %N
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%cmp2 = icmp sle i32 %iv2, %N
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call void @llvm.assume(i1 %cmp2)
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br i1 %cmp, label %exit, label %header
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exit:
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ret i32 %iv
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}
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define i32 @test3(i32 %N) nounwind {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[IV]]
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;
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entry:
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br label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.inc, %header]
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%iv2 = phi i32 [0, %entry], [%iv2.inc, %header]
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%iv.inc = add i32 %iv, 1
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%iv2.inc = add i32 %iv2, 1
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%cmp = icmp eq i32 %iv, %N
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%cmp2 = icmp sle i32 %iv2.inc, %N
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call void @llvm.assume(i1 %cmp2)
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br i1 %cmp, label %exit, label %header
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exit:
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ret i32 %iv
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}
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; Two assumes case.
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define i32 @test4(i32 %N) nounwind {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[IV]]
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;
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entry:
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br label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.inc, %header]
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%iv2 = phi i32 [0, %entry], [%iv2.inc, %header]
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%iv.inc = add i32 %iv, 1
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%iv2.inc = add i32 %iv2, 1
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%cmp = icmp eq i32 %iv, %N
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%cmp2 = icmp sle i32 %iv2.inc, %N
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call void @llvm.assume(i1 %cmp2)
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%cmp3 = icmp sge i32 %iv2.inc, 0
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call void @llvm.assume(i1 %cmp3)
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br i1 %cmp, label %exit, label %header
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exit:
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ret i32 %iv
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}
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; phi is used in assume and in compare.
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define i32 @test5(i32 %N, i32 %M) nounwind {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV2_INC:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[IV2_INC]] = add i32 [[IV2]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]
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; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i32 [[IV2_INC]], [[M:%.*]]
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; CHECK-NEXT: [[CMP4:%.*]] = and i1 [[CMP]], [[CMP3]]
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; CHECK-NEXT: br i1 [[CMP4]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[IV]]
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;
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entry:
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br label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.inc, %header]
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%iv2 = phi i32 [0, %entry], [%iv2.inc, %header]
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%iv.inc = add i32 %iv, 1
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%iv2.inc = add i32 %iv2, 1
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%cmp = icmp eq i32 %iv, %N
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%cmp2 = icmp sle i32 %iv2.inc, %N
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call void @llvm.assume(i1 %cmp2)
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%cmp3 = icmp sge i32 %iv2.inc, %M
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%cmp4 = and i1 %cmp, %cmp3
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br i1 %cmp4, label %exit, label %header
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exit:
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ret i32 %iv
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}
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declare i64 @foo(ptr) nounwind readonly willreturn
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declare void @llvm.assume(i1 noundef) nounwind willreturn
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