With commit https://reviews.llvm.org/D152366 I introduced functionality that permitted the hoisting of runtime memory checks from a vectorised inner loop to the preheader of the next outer-most loop. This is useful for benchmarks like SPEC2017's x264 where the inner loop is vectorised and only has a small trip count. In such cases the runtime memory checks become expensive and since the checks never fail in the case of x264 it makes sense to do this. However, this behaviour was controlled by the flag -hoist-runtime-checks which was off by default. This patch enables this flag by default for all targets, since I believe this is a generally beneficial thing to do. I have tested this with SPEC2017 and I see 2.3% and 2.6% improvements with x264 on neoverse-v1 and neoverse-n1, respectively. Similarly, I saw slight improvements in the overall geomean on both machines. The only other notable changes were a 1% drop in the roms benchmark, which was compensated for by a 1% improvement in fotonik3d.
323 lines
12 KiB
LLVM
323 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt %s -passes=loop-vectorize -hoist-runtime-checks=false -force-vector-width=4 -force-vector-interleave=1 -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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define void @same_step_and_size(ptr %a, i32* %b, i64 %n) {
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; CHECK-LABEL: @same_step_and_size(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64
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; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[B1]], [[A2]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds i32, ptr %a, i64 %iv
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%l = load i32, ptr %gep.a
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%mul = mul nsw i32 %l, 3
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 %mul, ptr %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @same_step_and_size_no_dominance_between_accesses(ptr %a, ptr %b, i64 %n, i64 %x) {
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; CHECK-LABEL: @same_step_and_size_no_dominance_between_accesses(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B2:%.*]] = ptrtoint ptr [[B:%.*]] to i64
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; CHECK-NEXT: [[A1:%.*]] = ptrtoint ptr [[A:%.*]] to i64
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[A1]], [[B2]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%cmp = icmp ne i64 %iv, %x
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br i1 %cmp, label %then, label %else
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then:
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%gep.a = getelementptr inbounds i32, ptr %a, i64 %iv
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store i32 0, ptr %gep.a
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br label %loop.latch
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else:
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 10, ptr %gep.b
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br label %loop.latch
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loop.latch:
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @different_steps_and_different_access_sizes(ptr %a, ptr %b, i64 %n) {
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; CHECK-LABEL: @different_steps_and_different_access_sizes(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[N_SHL_2:%.]] = shl i64 %n, 2
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr %b, i64 [[N_SHL_2]]
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; CHECK-NEXT: [[N_SHL_1:%.]] = shl i64 %n, 1
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr %a, i64 [[N_SHL_1]]
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr %b, [[SCEVGEP4]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr %a, [[SCEVGEP]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds i16, ptr %a, i64 %iv
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%l = load i16, ptr %gep.a
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%l.ext = sext i16 %l to i32
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%mul = mul nsw i32 %l.ext, 3
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 %mul, ptr %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @steps_match_but_different_access_sizes_1(ptr %a, ptr %b, i64 %n) {
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; CHECK-LABEL: @steps_match_but_different_access_sizes_1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64
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; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[B1]], -2
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; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[A2]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP1]], 16
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds [2 x i16], ptr %a, i64 %iv, i64 1
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%l = load i16, ptr %gep.a
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%l.ext = sext i16 %l to i32
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%mul = mul nsw i32 %l.ext, 3
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 %mul, ptr %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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; Same as @steps_match_but_different_access_sizes_1, but with source and sink
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; accesses flipped.
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define void @steps_match_but_different_access_sizes_2(ptr %a, ptr %b, i64 %n) {
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; CHECK-LABEL: @steps_match_but_different_access_sizes_2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B2:%.*]] = ptrtoint ptr [[B:%.*]] to i64
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; CHECK-NEXT: [[A1:%.*]] = ptrtoint ptr [[A:%.*]] to i64
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[A1]], 2
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; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[B2]]
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP1]], 16
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
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%l = load i32, ptr %gep.b
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%mul = mul nsw i32 %l, 3
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%gep.a = getelementptr inbounds [2 x i16], ptr %a, i64 %iv, i64 1
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%trunc = trunc i32 %mul to i16
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store i16 %trunc, ptr %gep.a
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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; Full no-overlap checks are required instead of difference checks, as
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; one of the add-recs used is invariant in the inner loop.
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; Test case for PR57315.
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define void @nested_loop_outer_iv_addrec_invariant_in_inner1(ptr %a, ptr %b, i64 %n) {
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; CHECK-LABEL: @nested_loop_outer_iv_addrec_invariant_in_inner1(
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; CHECK: entry:
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; CHECK-NEXT: [[N_SHL_2:%.]] = shl i64 %n, 2
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; CHECK-NEXT: [[B_GEP_UPPER:%.*]] = getelementptr i8, ptr %b, i64 [[N_SHL_2]]
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; CHECK-NEXT: br label %outer
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; CHECK: outer.header:
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; CHECK: [[OUTER_IV_SHL_2:%.]] = shl i64 %outer.iv, 2
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; CHECK-NEXT: [[A_GEP_UPPER:%.*]] = getelementptr i8, ptr %a, i64 [[OUTER_IV_SHL_2]]
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; CHECK-NEXT: [[OUTER_IV_4:%.]] = add i64 [[OUTER_IV_SHL_2]], 4
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; CHECK-NEXT: [[A_GEP_UPPER_4:%.*]] = getelementptr i8, ptr %a, i64 [[OUTER_IV_4]]
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; CHECK: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A_GEP_UPPER]], [[B_GEP_UPPER]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr %b, [[A_GEP_UPPER_4]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %outer.header
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outer.header:
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%outer.iv = phi i64 [ %outer.iv.next, %outer.latch ], [ 0, %entry ]
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%gep.a = getelementptr inbounds i32, ptr %a, i64 %outer.iv
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br label %inner.body
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inner.body:
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%inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner.body ]
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %inner.iv
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%l = load i32, ptr %gep.b, align 4
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%sub = sub i32 %l, 10
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store i32 %sub, ptr %gep.a, align 4
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%inner.iv.next = add nuw nsw i64 %inner.iv, 1
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%inner.cond = icmp eq i64 %inner.iv.next, %n
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br i1 %inner.cond, label %outer.latch, label %inner.body
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outer.latch:
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%outer.iv.next = add nuw nsw i64 %outer.iv, 1
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%outer.cond = icmp eq i64 %outer.iv.next, %n
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br i1 %outer.cond, label %exit, label %outer.header
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exit:
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ret void
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}
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; Same as @nested_loop_outer_iv_addrec_invariant_in_inner1 but with dependence
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; sink and source swapped.
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define void @nested_loop_outer_iv_addrec_invariant_in_inner2(ptr %a, ptr %b, i64 %n) {
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; CHECK-LABEL: @nested_loop_outer_iv_addrec_invariant_in_inner2(
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; CHECK: entry:
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; CHECK-NEXT: [[N_SHL_2:%.]] = shl i64 %n, 2
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; CHECK-NEXT: [[B_GEP_UPPER:%.*]] = getelementptr i8, ptr %b, i64 [[N_SHL_2]]
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; CHECK-NEXT: br label %outer
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; CHECK: outer.header:
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; CHECK: [[OUTER_IV_SHL_2:%.]] = shl i64 %outer.iv, 2
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; CHECK-NEXT: [[A_GEP_UPPER:%.*]] = getelementptr i8, ptr %a, i64 [[OUTER_IV_SHL_2]]
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; CHECK-NEXT: [[OUTER_IV_4:%.]] = add i64 [[OUTER_IV_SHL_2]], 4
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; CHECK-NEXT: [[A_GEP_UPPER_4:%.*]] = getelementptr i8, ptr %a, i64 [[OUTER_IV_4]]
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; CHECK: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr %b, [[A_GEP_UPPER_4]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A_GEP_UPPER]], [[B_GEP_UPPER]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %outer.header
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outer.header:
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%outer.iv = phi i64 [ %outer.iv.next, %outer.latch ], [ 0, %entry ]
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%gep.a = getelementptr inbounds i32, ptr %a, i64 %outer.iv
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br label %inner.body
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inner.body:
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%inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner.body ]
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%l = load i32, ptr %gep.a, align 4
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%sub = sub i32 %l, 10
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%gep.b = getelementptr inbounds i32, ptr %b, i64 %inner.iv
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store i32 %sub, ptr %gep.b, align 4
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%inner.iv.next = add nuw nsw i64 %inner.iv, 1
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%inner.cond = icmp eq i64 %inner.iv.next, %n
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br i1 %inner.cond, label %outer.latch, label %inner.body
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outer.latch:
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%outer.iv.next = add nuw nsw i64 %outer.iv, 1
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%outer.cond = icmp eq i64 %outer.iv.next, %n
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br i1 %outer.cond, label %exit, label %outer.header
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exit:
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ret void
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}
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; Test case where the AddRec for the pointers in the inner loop have the AddRec
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; of the outer loop as start value. It is sufficient to subtract the start
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; values (%dst, %src) of the outer AddRecs.
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define void @nested_loop_start_of_inner_ptr_addrec_is_same_outer_addrec(ptr nocapture noundef %dst, ptr nocapture noundef readonly %src, i64 noundef %m, i64 noundef %n) {
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; CHECK-LABEL: @nested_loop_start_of_inner_ptr_addrec_is_same_outer_addrec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC:%.*]] to i64
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; CHECK-NEXT: [[DST1:%.*]] = ptrtoint ptr [[DST:%.*]] to i64
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; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[DST1]], [[SRC2]]
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; CHECK-NEXT: br label [[OUTER_LOOP:%.*]]
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; CHECK: outer.loop:
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; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[OUTER_IV_NEXT:%.*]], [[INNER_EXIT:%.*]] ]
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[OUTER_IV]], [[N]]
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[SUB]], 16
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
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;
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entry:
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br label %outer.loop
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outer.loop:
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%outer.iv = phi i64 [ 0, %entry ], [ %outer.iv.next, %inner.exit ]
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%mul = mul nsw i64 %outer.iv, %n
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br label %inner.loop
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inner.loop:
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%iv.inner = phi i64 [ 0, %outer.loop ], [ %iv.inner.next, %inner.loop ]
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%idx = add nuw nsw i64 %iv.inner, %mul
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%gep.src = getelementptr inbounds i32, ptr %src, i64 %idx
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%l = load i32, ptr %gep.src, align 4
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%gep.dst = getelementptr inbounds i32, ptr %dst, i64 %idx
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%add = add nsw i32 %l, 10
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store i32 %add, ptr %gep.dst, align 4
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%iv.inner.next = add nuw nsw i64 %iv.inner, 1
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%inner.exit.cond = icmp eq i64 %iv.inner.next, %n
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br i1 %inner.exit.cond, label %inner.exit, label %inner.loop
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inner.exit:
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%outer.iv.next = add nuw nsw i64 %outer.iv, 1
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%outer.exit.cond = icmp eq i64 %outer.iv.next, %m
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br i1 %outer.exit.cond, label %outer.exit, label %outer.loop
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outer.exit:
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ret void
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}
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