e39f6c1844
There are many tests that specify a target triple/CPU flags but no DataLayout which can lead to IR being generated that has unusual behaviour. This commit attempts to use the default DataLayout based on the relevant flags if there is no explicit override on the command line or in the IR file. One thing that is not currently possible to differentiate from a missing datalayout `target datalayout = ""` in the IR file since the current APIs don't allow detecting this case. If it is considered useful to support this case (instead of passing "-data-layout=" on the command line), I can change IR parsers to track whether they have seen such a directive and change the callback type. Differential Revision: https://reviews.llvm.org/D141060
81 lines
3.4 KiB
LLVM
81 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-apple-macosx -mcpu=haswell < %s | FileCheck %s
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define void @test(ptr %r, ptr %p, ptr %q) #0 {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 0
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; CHECK-NEXT: [[Q0:%.*]] = getelementptr inbounds i64, ptr [[Q:%.*]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr [[P0]], align 2
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; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i64>, ptr [[Q0]], align 2
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; CHECK-NEXT: [[TMP3:%.*]] = sub nsw <4 x i64> [[TMP1]], [[TMP2]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i64> [[TMP3]], i32 0
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; CHECK-NEXT: [[G0:%.*]] = getelementptr inbounds i32, ptr [[R:%.*]], i64 [[TMP4]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i32 1
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; CHECK-NEXT: [[G1:%.*]] = getelementptr inbounds i32, ptr [[R]], i64 [[TMP5]]
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i64> [[TMP3]], i32 2
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; CHECK-NEXT: [[G2:%.*]] = getelementptr inbounds i32, ptr [[R]], i64 [[TMP6]]
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP3]], i32 3
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; CHECK-NEXT: [[G3:%.*]] = getelementptr inbounds i32, ptr [[R]], i64 [[TMP7]]
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; CHECK-NEXT: ret void
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;
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%p0 = getelementptr inbounds i64, ptr %p, i64 0
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%p1 = getelementptr inbounds i64, ptr %p, i64 1
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%p2 = getelementptr inbounds i64, ptr %p, i64 2
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%p3 = getelementptr inbounds i64, ptr %p, i64 3
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%q0 = getelementptr inbounds i64, ptr %q, i64 0
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%q1 = getelementptr inbounds i64, ptr %q, i64 1
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%q2 = getelementptr inbounds i64, ptr %q, i64 2
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%q3 = getelementptr inbounds i64, ptr %q, i64 3
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%x0 = load i64, ptr %p0, align 2
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%x1 = load i64, ptr %p1, align 2
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%x2 = load i64, ptr %p2, align 2
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%x3 = load i64, ptr %p3, align 2
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%y0 = load i64, ptr %q0, align 2
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%y1 = load i64, ptr %q1, align 2
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%y2 = load i64, ptr %q2, align 2
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%y3 = load i64, ptr %q3, align 2
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%sub0 = sub nsw i64 %x0, %y0
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%sub1 = sub nsw i64 %x1, %y1
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%sub2 = sub nsw i64 %x2, %y2
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%sub3 = sub nsw i64 %x3, %y3
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%g0 = getelementptr inbounds i32, ptr %r, i64 %sub0
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%g1 = getelementptr inbounds i32, ptr %r, i64 %sub1
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%g2 = getelementptr inbounds i32, ptr %r, i64 %sub2
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%g3 = getelementptr inbounds i32, ptr %r, i64 %sub3
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ret void
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}
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define void @test2(i64* %a, i64* %b) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 1
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; CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 2
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; CHECK-NEXT: [[I1:%.*]] = ptrtoint ptr [[A1]] to i64
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; CHECK-NEXT: [[B3:%.*]] = getelementptr inbounds i64, ptr [[B:%.*]], i64 3
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; CHECK-NEXT: [[I2:%.*]] = ptrtoint ptr [[B3]] to i64
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; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[A1]], align 8
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A2]], align 8
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; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[I1]], [[V1]]
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; CHECK-NEXT: [[ADD2:%.*]] = add i64 [[I2]], [[V2]]
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; CHECK-NEXT: store i64 [[ADD1]], ptr [[A1]], align 8
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; CHECK-NEXT: store i64 [[ADD2]], ptr [[A2]], align 8
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; CHECK-NEXT: ret void
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;
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%a1 = getelementptr inbounds i64, i64* %a, i64 1
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%a2 = getelementptr inbounds i64, i64* %a, i64 2
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%i1 = ptrtoint i64* %a1 to i64
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%b3 = getelementptr inbounds i64, i64* %b, i64 3
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%i2 = ptrtoint i64* %b3 to i64
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%v1 = load i64, i64* %a1, align 8
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%v2 = load i64, i64* %a2, align 8
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%add1 = add i64 %i1, %v1
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%add2 = add i64 %i2, %v2
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store i64 %add1, i64* %a1, align 8
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store i64 %add2, i64* %a2, align 8
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ret void
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}
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