Yeting Kuo 0f8c761c48 [VP][RISCV] Recommit "Add vp.fshl/fshr and RISC-V support." ...

This reverts commit 7883e5b061.

The original commit was reverted that it didn't update test files after D136263
landed. The recommit fixed those.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D139509

2022-12-07 15:58:12 +08:00

..

CMakeLists.txt

…

DAGCombiner.cpp

[llvm] Use std::nullopt instead of None in comments (NFC)

2022-12-04 17:31:17 -08:00

FastISel.cpp

Remove unused #include "llvm/ADT/Optional.h"

2022-12-05 06:31:11 +00:00

FunctionLoweringInfo.cpp

WebAssembly: Move exception handling code together

2022-11-02 16:05:34 -07:00

InstrEmitter.cpp

[AArch64][SME] Add support for arm_locally_streaming functions.

2022-10-14 13:47:53 +00:00

InstrEmitter.h

…

LegalizeDAG.cpp

[AArch64] Support SETCCCARRY lowering

2022-10-14 22:29:31 +03:00

LegalizeFloatTypes.cpp

[SelectionDAG] Rewrite bfloat16 softening to use the "half promotion" path

2022-09-06 11:54:34 +02:00

LegalizeIntegerTypes.cpp

[DAG] ExpandIntRes_MINMAX - simplify cases with sufficient number of sign bits

2022-10-28 17:10:45 +01:00

LegalizeTypes.cpp

[X86] Allow no X87 on 32-bit

2022-11-22 10:47:47 +08:00

LegalizeTypes.h

[LegalizeTypes] Support widen result for VECTOR_REVERSE.

2022-08-30 10:01:26 +08:00

LegalizeTypesGeneric.cpp

[LegalizeTypes] Use getVectorElementCount to avoid crash of scalable vector.

2022-09-28 17:31:29 +08:00

LegalizeVectorOps.cpp

[VP][RISCV] Recommit "Add vp.fshl/fshr and RISC-V support."

2022-12-07 15:58:12 +08:00

LegalizeVectorTypes.cpp

[VP][RISCV] Recommit "Add vp.fshl/fshr and RISC-V support."

2022-12-07 15:58:12 +08:00

ResourcePriorityQueue.cpp

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ScheduleDAGFast.cpp

[CodeGen] Qualify auto variables in for loops (NFC)

2022-07-17 01:33:28 -07:00

ScheduleDAGRRList.cpp

[NFC][ScheduleDAG] Use a reference to iterate over NodeSuccs/ChainSuccs

2022-09-12 15:54:48 +03:00

ScheduleDAGSDNodes.cpp

[AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNode

2022-09-15 22:03:56 +02:00

ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

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SelectionDAG.cpp

DAG: ComputeNumSignBits from load range metadata

2022-12-05 11:57:13 -05:00

SelectionDAGAddressAnalysis.cpp

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SelectionDAGBuilder.cpp

[NFC] Use Register instead of unsigned for variables that receive a Register object

2022-12-07 00:23:34 +00:00

SelectionDAGBuilder.h

TargetLowering: convert Optional to std::optional

2022-12-01 16:19:10 -08:00

SelectionDAGDumper.cpp

[SDAG] Print divergence in SDNode::dump

2022-09-16 11:43:34 -07:00

SelectionDAGISel.cpp

Revert "[Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2"

2022-12-02 02:44:18 -08:00

SelectionDAGPrinter.cpp

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SelectionDAGTargetInfo.cpp

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StatepointLowering.cpp

[NFC] Use Register instead of unsigned for variables that receive a Register object

2022-12-07 00:23:34 +00:00

StatepointLowering.h

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TargetLowering.cpp

[VP][RISCV] Recommit "Add vp.fshl/fshr and RISC-V support."

2022-12-07 15:58:12 +08:00