Fangrui Song b0df70403d [Target] llvm::Optional => std::optional ...

The updated functions are mostly internal with a few exceptions (virtual functions in
TargetInstrInfo.h, TargetRegisterInfo.h).
To minimize changes to LLVMCodeGen, GlobalISel files are skipped.

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

2022-12-04 22:43:14 +00:00

..

AsmParser

…

Disassembler

Rename MCFixedLenDisassembler.h as MCDecoderOps.h

2022-05-15 08:44:58 +08:00

MCTargetDesc

[CodeGen] Move instruction predicate verification to emitInstruction

2022-07-14 09:33:28 +01:00

TargetInfo

…

CMakeLists.txt

…

LVLGen.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VE.h

[VE] Change the way to lower select

2022-10-15 08:49:36 +09:00

VE.td

[TableGen] Add useDeprecatedPositionallyEncodedOperands option.

2022-09-24 09:40:45 -04:00

VEAsmPrinter.cpp

[VE] Support inlineasm memory operand

2022-08-23 13:44:03 +09:00

VECallingConv.td

[VE] Correct VMP allocation in calling conv

2020-12-21 22:42:24 +09:00

VECustomDAG.cpp

[Target] llvm::Optional => std::optional

2022-12-04 22:43:14 +00:00

VECustomDAG.h

[Target] llvm::Optional => std::optional

2022-12-04 22:43:14 +00:00

VEFrameLowering.cpp

[Target] Use std::nullopt instead of None (NFC)

2022-12-02 20:36:06 -08:00

VEFrameLowering.h

[llvm] Use std::size instead of llvm::array_lengthof

2022-09-08 09:01:53 -06:00

VEInstrBuilder.h

…

VEInstrFormats.td

…

VEInstrInfo.cpp

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEInstrInfo.h

…

VEInstrInfo.td

[VE] Remove unnecessary isReMaterializable flags

2022-11-25 17:52:20 +09:00

VEInstrIntrinsicVL.gen.td

…

VEInstrIntrinsicVL.td

…

VEInstrPatternsVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEInstrVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEISelDAGToDAG.cpp

[VE] Change the way to lower select

2022-10-15 08:49:36 +09:00

VEISelLowering.cpp

[AMDGPU] Allow finer grain control of an unaligned access speed

2022-11-17 09:23:53 -08:00

VEISelLowering.h

[AMDGPU] Allow finer grain control of an unaligned access speed

2022-11-17 09:23:53 -08:00

VEMachineFunctionInfo.cpp

llvm-reduce: Add cloning of target MachineFunctionInfo

2022-06-07 10:14:48 -04:00

VEMachineFunctionInfo.h

llvm-reduce: Add cloning of target MachineFunctionInfo

2022-06-07 10:14:48 -04:00

VEMCInstLower.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VERegisterInfo.cpp

PEI should be able to use backward walk in replaceFrameIndicesBackward.

2022-11-18 15:57:34 +01:00

VERegisterInfo.h

PEI should be able to use backward walk in replaceFrameIndicesBackward.

2022-11-18 15:57:34 +01:00

VERegisterInfo.td

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

VESubtarget.cpp

Move TargetRegistry.(h|cpp) from Support to MC

2021-10-08 14:51:48 -07:00

VESubtarget.h

…

VETargetMachine.cpp

CodeGen/CommandFlags: Convert Optional to std::optional

2022-12-03 18:38:12 +00:00

VETargetMachine.h

CodeGen/CommandFlags: Convert Optional to std::optional

2022-12-03 18:38:12 +00:00

VETargetTransformInfo.h

…

VVPInstrInfo.td

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VVPInstrPatternsVec.td

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VVPISelLowering.cpp

[llvm] Use value instead of getValue (NFC)

2022-07-13 23:11:56 -07:00

VVPNodes.def

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00