f62d8a1a50
Before this patch: - For `r = or op0, op1`, `tryBitfieldInsertOpFromOr` combines it to BFI when 1) one of the two operands is bit-field-positioning or bit-field-extraction op; and 2) bits from the two operands don't overlap After this patch: - Right before OR is combined to BFI, evaluates if ORR with left-shifted operand is better. A motivating example (https://godbolt.org/z/rnMrzs5vn, which is added as a test case in `test_orr_not_bfi` in `CodeGen/AArch64/bitfield-insert.ll`) For IR: ``` define i64 @test_orr_not_bfxil(i64 %0) { %2 = and i64 %0, 127 %3 = lshr i64 %0, 1 %4 = and i64 %3, 16256 %5 = or i64 %4, %2 ret i64 %5 } ``` Before: ``` lsr x8, x0, #1 and x8, x8, #0x3f80 bfxil x8, x0, #0, #7 ``` After: ``` ubfx x8, x0, #8, #7 and x9, x0, #0x7f orr x0, x9, x8, lsl #7 ``` Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D135102
25 lines
848 B
LLVM
25 lines
848 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -mtriple=aarch64 -o - -O0 %s | FileCheck %s
|
|
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
|
target triple = "arm64-apple-ios5.0.0"
|
|
|
|
; This test checks we don't fail isel due to unhandled build_pair nodes.
|
|
define void @compare_and_swap128() {
|
|
; CHECK-LABEL: compare_and_swap128:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: //APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: //NO_APP
|
|
; CHECK-NEXT: // implicit-def: $x9
|
|
; CHECK-NEXT: mov w9, w10
|
|
; CHECK-NEXT: mov w8, w8
|
|
; CHECK-NEXT: // kill: def $x8 killed $w8
|
|
; CHECK-NEXT: orr x8, x8, x9, lsl #32
|
|
; CHECK-NEXT: // implicit-def: $x9
|
|
; CHECK-NEXT: str x8, [x9]
|
|
; CHECK-NEXT: ret
|
|
%1 = call i128 asm sideeffect "nop", "=r,~{memory}"()
|
|
store i128 %1, i128* undef, align 16
|
|
ret void
|
|
}
|