11cea7e5ce
* For ext-narrow-index.ll, move vscale_range attribute closer to the function definition, rather than through indirect #<num> attribute. This makes the test a bit easier to read. * auto-generated CHECK lines for sve-cmp-select.ll and named-vector-shuffles-sve.ll. * re-generated CHECK lines for tests that had a mention they were auto-generated, but where the CHECK lines were out of date.
115 lines
4.2 KiB
LLVM
115 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s
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define <4 x i8> @concat1(<2 x i8> %A, <2 x i8> %B) {
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; CHECK-LABEL: concat1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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%v4i8 = shufflevector <2 x i8> %A, <2 x i8> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x i8> %v4i8
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}
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define <8 x i8> @concat2(<4 x i8> %A, <4 x i8> %B) {
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; CHECK-LABEL: concat2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: ret
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%v8i8 = shufflevector <4 x i8> %A, <4 x i8> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x i8> %v8i8
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}
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define <16 x i8> @concat3(<8 x i8> %A, <8 x i8> %B) {
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; CHECK-LABEL: concat3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: ret
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%v16i8 = shufflevector <8 x i8> %A, <8 x i8> %B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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ret <16 x i8> %v16i8
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}
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define <4 x i16> @concat4(<2 x i16> %A, <2 x i16> %B) {
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; CHECK-LABEL: concat4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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%v4i16 = shufflevector <2 x i16> %A, <2 x i16> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x i16> %v4i16
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}
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define <8 x i16> @concat5(<4 x i16> %A, <4 x i16> %B) {
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; CHECK-LABEL: concat5:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: ret
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%v8i16 = shufflevector <4 x i16> %A, <4 x i16> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x i16> %v8i16
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}
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define <16 x i16> @concat6(<8 x i16>* %A, <8 x i16>* %B) {
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; CHECK-LABEL: concat6:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x1]
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; CHECK-NEXT: ret
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%tmp1 = load <8 x i16>, <8 x i16>* %A
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%tmp2 = load <8 x i16>, <8 x i16>* %B
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%v16i16 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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ret <16 x i16> %v16i16
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}
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define <4 x i32> @concat7(<2 x i32> %A, <2 x i32> %B) {
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; CHECK-LABEL: concat7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: ret
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%v4i32 = shufflevector <2 x i32> %A, <2 x i32> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x i32> %v4i32
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}
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define <8 x i32> @concat8(<4 x i32>* %A, <4 x i32>* %B) {
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; CHECK-LABEL: concat8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x1]
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; CHECK-NEXT: ret
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%tmp1 = load <4 x i32>, <4 x i32>* %A
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%tmp2 = load <4 x i32>, <4 x i32>* %B
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%v8i32 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x i32> %v8i32
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}
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define <4 x half> @concat9(<2 x half> %A, <2 x half> %B) {
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; CHECK-LABEL: concat9:
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; CHECK: // %bb.0:
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; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
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; CHECK-NEXT: ret
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%v4half= shufflevector <2 x half> %A, <2 x half> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x half> %v4half
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}
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define <8 x half> @concat10(<4 x half> %A, <4 x half> %B) {
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; CHECK-LABEL: concat10:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: ret
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%v8half= shufflevector <4 x half> %A, <4 x half> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x half> %v8half
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}
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define <16 x half> @concat11(<8 x half> %A, <8 x half> %B) {
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; CHECK-LABEL: concat11:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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%v16half= shufflevector <8 x half> %A, <8 x half> %B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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ret <16 x half> %v16half
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}
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