7c13ae6490
treated as Copy instruction in MCP. This is then used in AArch64 to remove copy instructions after taildup ran in machine block placement Differential Revision: https://reviews.llvm.org/D125335
41 lines
1.0 KiB
LLVM
41 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O3 -mtriple=aarch64-- | FileCheck %s
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define void @copyprop_after_mbp(i32 %v, i32* %a, i32* %b, i32* %c, i32* %d) {
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; CHECK-LABEL: copyprop_after_mbp:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #10
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; CHECK-NEXT: b.ne .LBB0_2
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; CHECK-NEXT: // %bb.1: // %bb.0
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; CHECK-NEXT: mov w9, #15
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: str w9, [x2]
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; CHECK-NEXT: mov w9, #12
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; CHECK-NEXT: str w8, [x1]
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; CHECK-NEXT: str w9, [x4]
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: // %bb.1
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; CHECK-NEXT: mov w9, #25
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; CHECK-NEXT: str w9, [x3]
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; CHECK-NEXT: mov w9, #12
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; CHECK-NEXT: str wzr, [x1]
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; CHECK-NEXT: str w9, [x4]
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; CHECK-NEXT: ret
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%1 = icmp eq i32 %v, 10
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br i1 %1, label %bb.0, label %bb.1
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bb.0:
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store i32 15, i32* %b, align 4
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br label %bb.2
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bb.1:
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store i32 25, i32* %c, align 4
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br label %bb.2
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bb.2:
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%2 = phi i32 [ 1, %bb.0 ], [ 0, %bb.1 ]
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store i32 %2, i32* %a, align 4
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store i32 12, i32* %d, align 4
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ret void
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}
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