4edb9983cb
Completely rework how we handle X constrained labels for inline asm. X should really be treated as i. Then existing tests can be moved to use i D115410 and clang can just emit i D115311. (D115410 and D115311 are callbr, but this can be done for label inputs, too). Coincidentally, this simplification solves an ICE uncovered by D87279 based on assumptions made during D69868. This is the third approach considered. See also discussions v1 (D114895) and v2 (D115409). Reported-by: kernel test robot <lkp@intel.com> Fixes: https://github.com/ClangBuiltLinux/linux/issues/1512 Reviewed By: void, jyknight Differential Revision: https://reviews.llvm.org/D115688
147 lines
4.2 KiB
LLVM
147 lines
4.2 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o - | FileCheck %s
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; The following functions test the use case where an X constraint is used to
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; add a dependency between an assembly instruction (vmsr in this case) and
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; another instruction. In each function, we use a different type for the
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; X constraint argument.
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;
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; We can something similar from the following C code:
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; double f1(double f, int pscr_value) {
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; asm volatile("msr fpsr,%1" : "=X" ((f)): "r" (pscr_value));
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; return f+f;
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; }
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; CHECK-LABEL: f1
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; CHECK: msr FPSR
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; CHECK: fadd d
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define double @f1(double %f, i32 %pscr_value) {
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entry:
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%f.addr = alloca double, align 8
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store double %f, double* %f.addr, align 8
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call void asm sideeffect "msr fpsr,$1", "=*X,r"(double* elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
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%0 = load double, double* %f.addr, align 8
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%add = fadd double %0, %0
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ret double %add
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}
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; int f2(int f, int pscr_value) {
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; asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
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; return f*f;
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; }
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; CHECK-LABEL: f2
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; CHECK: msr FPSR
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; CHECK: mul
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define i32 @f2(i32 %f, i32 %pscr_value) {
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entry:
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%f.addr = alloca i32, align 4
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store i32 %f, i32* %f.addr, align 4
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call void asm sideeffect "msr fpsr,$1", "=*X,r"(i32* elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
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%0 = load i32, i32* %f.addr, align 4
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%mul = mul i32 %0, %0
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ret i32 %mul
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}
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; typedef signed char int8_t;
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; typedef __attribute__((neon_vector_type(8))) int8_t int8x8_t;
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; void f3 (void)
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; {
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; int8x8_t vector_res_int8x8;
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; unsigned int fpscr;
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; asm volatile ("msr fpsr,$1" : "=X" ((vector_res_int8x8)) : "r" (fpscr));
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; return vector_res_int8x8 * vector_res_int8x8;
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; }
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; CHECK-LABEL: f3
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; CHECK: msr FPSR
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; CHECK: mul
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define <8 x i8> @f3() {
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entry:
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%vector_res_int8x8 = alloca <8 x i8>, align 8
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%0 = getelementptr inbounds <8 x i8>, <8 x i8>* %vector_res_int8x8, i32 0, i32 0
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call void asm sideeffect "msr fpsr,$1", "=*X,r"(<8 x i8>* elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
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%1 = load <8 x i8>, <8 x i8>* %vector_res_int8x8, align 8
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%mul = mul <8 x i8> %1, %1
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ret <8 x i8> %mul
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}
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; We can emit integer constants.
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; We can get this from:
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; void f() {
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; int x = 2;
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; asm volatile ("add x0, x0, %0" : : "X" (x));
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; }
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;
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; CHECK-LABEL: f4
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; CHECK: add x0, x0, #2
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define void @f4() {
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entry:
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tail call void asm sideeffect "add x0, x0, $0", "X"(i32 2)
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ret void
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}
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; We can emit function labels. This is equivalent to the following C code:
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; void f(void) {
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; void (*x)(void) = &foo;
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; asm volatile ("bl %0" : : "X" (x));
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; }
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; CHECK-LABEL: f5
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; CHECK: bl f4
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define void @f5() {
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entry:
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tail call void asm sideeffect "bl $0", "X"(void ()* nonnull @f4)
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ret void
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}
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declare void @foo(...)
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; This tests the behavior of the X constraint when used on functions pointers,
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; or functions with a cast. In the first asm call we figure out that this
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; is a function pointer and emit the label. However, in the second asm call
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; we can't see through the bitcast and we end up having to lower this constraint
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; to something else. This is not ideal, but it is a correct behaviour according
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; to the definition of the X constraint.
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;
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; In this case (and other cases where we could have emitted something else),
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; what we're doing with the X constraint is not particularly useful either,
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; since the user could have used "r" in this situation for the same effect.
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; CHECK-LABEL: f6
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; CHECK: bl foo
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; CHECK: br x
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define void @f6() nounwind {
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entry:
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tail call void asm sideeffect "bl $0", "X"(void (...)* @foo) nounwind
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tail call void asm sideeffect "br $0", "X"(void (...)* bitcast (void ()* @f4 to void (...)*)) nounwind
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ret void
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}
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; The following IR can be generated from C code with a function like:
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; void a() {
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; void* a = &&A;
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; asm volatile ("bl %0" : : "X" (a));
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; A:
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; return;
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; }
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; CHECK-LABEL: f7
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; CHECK: bl .Ltmp3
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define void @f7() {
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call void asm sideeffect "bl $0", "X"( i8* blockaddress(@f7, %bb) )
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br label %bb
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bb:
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ret void
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}
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; If we use a constraint "=*X", we should get a store back to *%x (in x0).
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; CHECK-LABEL: f8
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; CHECK: add [[Dest:x[0-9]+]], x0, x0
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; CHECK: str [[Dest]], [x0]
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define void @f8(i64 *%x) {
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entry:
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tail call void asm sideeffect "add $0, x0, x0", "=*X"(i64* elementtype(i64) %x)
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ret void
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}
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