d159b4444c
We have a pattern that undo sub x, c -> add x, -c canonicalization since c is more likely an inline immediate than -c. This patch enables it to select scalar or vector subtracion by the input node divergence. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D121360
29 lines
1.1 KiB
LLVM
29 lines
1.1 KiB
LLVM
; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s
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; FUNC-LABEL: {{^}}uniform_add_SIC:
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; GCN: S_SUB_I32 killed %{{[0-9]+}}, 32
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define amdgpu_kernel void @uniform_add_SIC(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%a = load i32, i32 addrspace(1)* %in
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%result = add i32 %a, -32
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}uniform_add_SIC:
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; SI: V_SUB_CO_U32_e64 killed %{{[0-9]+}}, 32
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; GFX900: V_SUB_U32_e64 killed %{{[0-9]+}}, 32
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define amdgpu_kernel void @divergent_add_SIC(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i32 %tid
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%a = load volatile i32, i32 addrspace(1)* %gep
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%result = add i32 %a, -32
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone speculatable }
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