1448aa9dbd
The "not" is defined as XOR $src -1. We need to transform this pattern to either S_NOT_B32 or V_NOT_B32_e32 dependent on the "xor" node divergence. Reviewed By: rampitec, foad Differential Revision: https://reviews.llvm.org/D115884
35 lines
882 B
LLVM
35 lines
882 B
LLVM
; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: name: scalar_not_i32
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; GCN: S_NOT_B32
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define amdgpu_kernel void @scalar_not_i32(i32 addrspace(1)* %out, i32 %val) {
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%not.val = xor i32 %val, -1
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store i32 %not.val, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: name: scalar_not_i64
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; GCN: S_NOT_B64
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define amdgpu_kernel void @scalar_not_i64(i64 addrspace(1)* %out, i64 %val) {
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%not.val = xor i64 %val, -1
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store i64 %not.val, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: name: vector_not_i32
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; GCN: V_NOT_B32_e32
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define i32 @vector_not_i32(i32 %val) {
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%not.val = xor i32 %val, -1
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ret i32 %not.val
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}
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; GCN-LABEL: name: vector_not_i64
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; GCN: V_NOT_B32_e32
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; GCN: V_NOT_B32_e32
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define i64 @vector_not_i64(i64 %val) {
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%not.val = xor i64 %val, -1
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ret i64 %not.val
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}
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