153359180a
Background: https://github.com/avr-rust/rust-legacy-fork/issues/126 In short, this workaround was introduced to fix a "ran out of registers during regalloc" issue. The root cause has since been fixed in https://reviews.llvm.org/D54218 so this workaround can be removed. There is one test that changes a little bit, removing a single instruction. I also compiled compiler-rt before and after this patch but didn't see a difference. So presumably the impact is very low. Still, it's nice to be able to remove such a workaround. Differential Revision: https://reviews.llvm.org/D117831
147 lines
4.6 KiB
LLVM
147 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O0 -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=CHECK-O0 %s
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; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O3 -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=CHECK-O3 %s
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@arr0 = addrspace(1) constant [4 x i16] [i16 123, i16 234, i16 456, i16 67], align 1
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@arr1 = addrspace(1) constant [4 x i8] c"ABCD", align 1
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define i16 @foo0(i16 %a) addrspace(1) {
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; CHECK-O0-LABEL: foo0:
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; CHECK-O0: ; %bb.0: ; %entry
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; CHECK-O0-NEXT: push r28
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; CHECK-O0-NEXT: push r29
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; CHECK-O0-NEXT: in r28, 61
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; CHECK-O0-NEXT: in r29, 62
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; CHECK-O0-NEXT: sbiw r28, 2
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; CHECK-O0-NEXT: in r0, 63
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; CHECK-O0-NEXT: cli
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; CHECK-O0-NEXT: out 62, r29
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; CHECK-O0-NEXT: out 63, r0
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; CHECK-O0-NEXT: out 61, r28
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; CHECK-O0-NEXT: std Y+1, r24
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; CHECK-O0-NEXT: std Y+2, r25
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; CHECK-O0-NEXT: ldd r30, Y+1
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; CHECK-O0-NEXT: ldd r31, Y+2
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; CHECK-O0-NEXT: lsl r30
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; CHECK-O0-NEXT: rol r31
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; CHECK-O0-NEXT: subi r30, -lo8(arr0)
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; CHECK-O0-NEXT: sbci r31, -hi8(arr0)
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; CHECK-O0-NEXT: lpm r24, Z+
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; CHECK-O0-NEXT: lpm r25, Z
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; CHECK-O0-NEXT: adiw r28, 2
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; CHECK-O0-NEXT: in r0, 63
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; CHECK-O0-NEXT: cli
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; CHECK-O0-NEXT: out 62, r29
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; CHECK-O0-NEXT: out 63, r0
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; CHECK-O0-NEXT: out 61, r28
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; CHECK-O0-NEXT: pop r29
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; CHECK-O0-NEXT: pop r28
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; CHECK-O0-NEXT: ret
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;
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; CHECK-O3-LABEL: foo0:
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; CHECK-O3: ; %bb.0: ; %entry
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; CHECK-O3-NEXT: push r28
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; CHECK-O3-NEXT: push r29
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; CHECK-O3-NEXT: in r28, 61
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; CHECK-O3-NEXT: in r29, 62
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; CHECK-O3-NEXT: sbiw r28, 2
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; CHECK-O3-NEXT: in r0, 63
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; CHECK-O3-NEXT: cli
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; CHECK-O3-NEXT: out 62, r29
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; CHECK-O3-NEXT: out 63, r0
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; CHECK-O3-NEXT: out 61, r28
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; CHECK-O3-NEXT: std Y+1, r24
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; CHECK-O3-NEXT: std Y+2, r25
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; CHECK-O3-NEXT: lsl r24
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; CHECK-O3-NEXT: rol r25
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; CHECK-O3-NEXT: subi r24, -lo8(arr0)
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; CHECK-O3-NEXT: sbci r25, -hi8(arr0)
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; CHECK-O3-NEXT: movw r30, r24
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; CHECK-O3-NEXT: lpm r24, Z+
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; CHECK-O3-NEXT: lpm r25, Z
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; CHECK-O3-NEXT: adiw r28, 2
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; CHECK-O3-NEXT: in r0, 63
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; CHECK-O3-NEXT: cli
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; CHECK-O3-NEXT: out 62, r29
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; CHECK-O3-NEXT: out 63, r0
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; CHECK-O3-NEXT: out 61, r28
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; CHECK-O3-NEXT: pop r29
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; CHECK-O3-NEXT: pop r28
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; CHECK-O3-NEXT: ret
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entry:
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%a.addr = alloca i16, align 1
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store i16 %a, i16* %a.addr, align 1
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%0 = load i16, i16* %a.addr, align 1
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%arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %0
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%1 = load i16, i16 addrspace(1)* %arrayidx, align 1
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ret i16 %1
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}
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define i8 @foo1(i16 %a) addrspace(1) {
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; CHECK-O0-LABEL: foo1:
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; CHECK-O0: ; %bb.0: ; %entry
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; CHECK-O0-NEXT: push r28
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; CHECK-O0-NEXT: push r29
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; CHECK-O0-NEXT: in r28, 61
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; CHECK-O0-NEXT: in r29, 62
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; CHECK-O0-NEXT: sbiw r28, 2
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; CHECK-O0-NEXT: in r0, 63
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; CHECK-O0-NEXT: cli
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; CHECK-O0-NEXT: out 62, r29
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; CHECK-O0-NEXT: out 63, r0
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; CHECK-O0-NEXT: out 61, r28
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; CHECK-O0-NEXT: std Y+1, r24
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; CHECK-O0-NEXT: std Y+2, r25
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; CHECK-O0-NEXT: ldd r30, Y+1
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; CHECK-O0-NEXT: ldd r31, Y+2
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; CHECK-O0-NEXT: subi r30, -lo8(arr1)
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; CHECK-O0-NEXT: sbci r31, -hi8(arr1)
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; CHECK-O0-NEXT: lpm r24, Z
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; CHECK-O0-NEXT: adiw r28, 2
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; CHECK-O0-NEXT: in r0, 63
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; CHECK-O0-NEXT: cli
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; CHECK-O0-NEXT: out 62, r29
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; CHECK-O0-NEXT: out 63, r0
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; CHECK-O0-NEXT: out 61, r28
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; CHECK-O0-NEXT: pop r29
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; CHECK-O0-NEXT: pop r28
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; CHECK-O0-NEXT: ret
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;
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; CHECK-O3-LABEL: foo1:
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; CHECK-O3: ; %bb.0: ; %entry
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; CHECK-O3-NEXT: push r28
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; CHECK-O3-NEXT: push r29
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; CHECK-O3-NEXT: in r28, 61
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; CHECK-O3-NEXT: in r29, 62
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; CHECK-O3-NEXT: sbiw r28, 2
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; CHECK-O3-NEXT: in r0, 63
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; CHECK-O3-NEXT: cli
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; CHECK-O3-NEXT: out 62, r29
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; CHECK-O3-NEXT: out 63, r0
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; CHECK-O3-NEXT: out 61, r28
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; CHECK-O3-NEXT: std Y+1, r24
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; CHECK-O3-NEXT: std Y+2, r25
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; CHECK-O3-NEXT: subi r24, -lo8(arr1)
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; CHECK-O3-NEXT: sbci r25, -hi8(arr1)
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; CHECK-O3-NEXT: movw r30, r24
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; CHECK-O3-NEXT: lpm r24, Z
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; CHECK-O3-NEXT: adiw r28, 2
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; CHECK-O3-NEXT: in r0, 63
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; CHECK-O3-NEXT: cli
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; CHECK-O3-NEXT: out 62, r29
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; CHECK-O3-NEXT: out 63, r0
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; CHECK-O3-NEXT: out 61, r28
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; CHECK-O3-NEXT: pop r29
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; CHECK-O3-NEXT: pop r28
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; CHECK-O3-NEXT: ret
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entry:
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%a.addr = alloca i16, align 1
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store i16 %a, i16* %a.addr, align 1
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%0 = load i16, i16* %a.addr, align 1
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%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arr1, i16 0, i16 %0
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%1 = load i8, i8 addrspace(1)* %arrayidx, align 1
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ret i8 %1
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}
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