cfd2c5ce58
There are two different senses in which a block can be "address-taken". There can be a BlockAddress involved, which means we need to map the IR-level value to some specific block of machine code. Or there can be constructs inside a function which involve using the address of a basic block to implement certain kinds of control flow. Mixing these together causes a problem: if target-specific passes are marking random blocks "address-taken", if we have a BlockAddress, we can't actually tell which MachineBasicBlock corresponds to the BlockAddress. So split this into two separate bits: one for BlockAddress, and one for the machine-specific bits. Discovered while trying to sort out related stuff on D102817. Differential Revision: https://reviews.llvm.org/D124697
209 lines
5.5 KiB
LLVM
209 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -march=hexagon -O3 -hexagon-instsimplify=0 < %s | FileCheck %s
|
|
|
|
define void @f0(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f0:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB0_1,#3)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB0_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 1
|
|
%v2 = icmp slt i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
define void @f1(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB1_1,#2)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB1_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 2
|
|
%v2 = icmp slt i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
define void @f2(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB2_1,#1)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB2_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 3
|
|
%v2 = icmp slt i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
define void @f3(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f3:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB3_1,#4)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB3_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 1
|
|
%v2 = icmp sle i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
define void @f4(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f4:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB4_1,#2)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB4_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 2
|
|
%v2 = icmp sle i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
define void @f5(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
|
|
; CHECK-LABEL: f5:
|
|
; CHECK: // %bb.0: // %b0
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: loop0(.LBB5_1,#2)
|
|
; CHECK-NEXT: }
|
|
; CHECK-NEXT: .p2align 4
|
|
; CHECK-NEXT: .LBB5_1: // Block address taken
|
|
; CHECK-NEXT: // %b2
|
|
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: } :endloop0
|
|
; CHECK-NEXT: // %bb.2: // %b3
|
|
; CHECK-NEXT: {
|
|
; CHECK-NEXT: jumpr r31
|
|
; CHECK-NEXT: }
|
|
b0:
|
|
br label %b1
|
|
|
|
b1: ; preds = %b0
|
|
br label %b2
|
|
|
|
b2: ; preds = %b2, %b1
|
|
%v0 = phi i32 [ 0, %b1 ], [ %v1, %b2 ]
|
|
%v1 = add nsw i32 %v0, 3
|
|
%v2 = icmp sle i32 %v1, 3
|
|
br i1 %v2, label %b2, label %b3
|
|
|
|
b3: ; preds = %b2
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind }
|