f5755c0849
The MIPS ABI requires the thread pointer be accessed via rdhwr $3, $r29. This is currently represented by (CopyToReg $3, (RDHWR $29)) followed by a (CopyFromReg $3). However, there is no glue between these, meaning scheduling can break those apart. In particular, PR51691 is a report where PseudoSELECT_I was moved to between the CopyToReg and CopyFromReg, and since its expansion uses branches, it split the def and use of the physical register between two basic blocks, resulting in the def being eliminated and the use having no def. It also seems possible that a similar situation could arise splitting up the CopyToReg from the RDHWR, causing the RDHWR to use a destination register other than $3, violating the ABI requirement. Thus, add glue between all three nodes to ensure they aren't split up during instruction selection. No regression test is added since any test would be implictly relying on specific scheduling behaviour, so whilst it might be testing that glue is preventing reordering today, changes to scheduling behaviour could result in the test no longer being able to catch a regression here, as the reordering might no longer happen for other unrelated reasons. Fixes PR51691. Reviewed By: atanasyan, dim Differential Revision: https://reviews.llvm.org/D111967
83 lines
2.9 KiB
LLVM
83 lines
2.9 KiB
LLVM
; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler \
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; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC32
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; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler \
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; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC64
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; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
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; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATICGP32
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; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
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; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATICGP64
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@t1 = dso_local thread_local global i32 0, align 4
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define dso_local i32 @f1() nounwind {
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entry:
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%tmp = load i32, i32* @t1, align 4
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ret i32 %tmp
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; STATIC32-LABEL: f1:
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; STATIC32: lui $[[R0:[0-9]+]], %tprel_hi(t1)
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; STATIC32: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
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; STATIC32: rdhwr $3, $29{{$}}
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; STATIC32: addu $[[R2:[0-9]+]], $3, $[[R1]]
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; STATIC32: lw $2, 0($[[R2]])
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; STATIC64-LABEL: f1:
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; STATIC64: lui $[[R0:[0-9]+]], %tprel_hi(t1)
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; STATIC64: daddiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
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; STATIC64: rdhwr $3, $29{{$}}
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; STATIC64: daddu $[[R2:[0-9]+]], $3, $[[R0]]
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; STATIC64: lw $2, 0($[[R2]])
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}
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@t2 = external thread_local global i32
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define dso_local i32 @f2() nounwind {
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entry:
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%tmp = load i32, i32* @t2, align 4
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ret i32 %tmp
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; STATICGP32-LABEL: f2:
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; STATICGP32: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
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; STATICGP32: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
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; STATICGP32: lw ${{[0-9]+}}, %gottprel(t2)($[[GP]])
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; STATICGP64-LABEL: f2:
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; STATICGP64: lui $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
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; STATICGP64: daddiu $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
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; STATICGP64: ld $1, %gottprel(t2)($[[GP]])
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; STATIC32-LABEL: f2:
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; STATIC32: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
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; STATIC32: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
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; STATIC32: lw $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
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; STATIC32: rdhwr $3, $29{{$}}
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; STATIC32: addu $[[R1:[0-9]+]], $3, $[[R0]]
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; STATIC32: lw $2, 0($[[R1]])
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; STATIC64-LABEL: f2:
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; STATIC64: lui $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
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; STATIC64: daddiu $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
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; STATIC64: ld $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
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; STATIC64: rdhwr $3, $29{{$}}
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; STATIC64: daddu $[[R1:[0-9]+]], $3, $[[R0]]
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; STATIC64: lw $2, 0($[[R1]])
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}
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@f3.i = internal thread_local unnamed_addr global i32 1, align 4
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define dso_local i32 @f3() nounwind {
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entry:
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; MM-LABEL: f3:
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; MM: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
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; MM: jalr $25
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; MM: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
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; MM: addu16 $[[R1:[0-9]+]], $[[R0]], $2
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; MM: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
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%0 = load i32, i32* @f3.i, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @f3.i, align 4
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ret i32 %inc
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}
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