eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
103 lines
3.4 KiB
LLVM
103 lines
3.4 KiB
LLVM
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
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; RUN: -stop-after=machine-cp --verify-machineinstrs < %s | FileCheck \
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; RUN: --check-prefixes=MIR,MIR32 %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
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; RUN: -stop-after=machine-cp --verify-machineinstrs < %s | FileCheck \
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; RUN: --check-prefixes=MIR,MIR64 %s
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; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
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; RUN: --verify-machineinstrs < %s | FileCheck --check-prefixes=ASM,ASM32 %s
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec \
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; RUN: --verify-machineinstrs < %s | FileCheck --check-prefixes=ASM,ASM64 %s
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%struct.S = type { i8 }
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%struct.T = type { double, i32, i32, i32, float }
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define void @test1() {
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entry:
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%s = alloca %struct.S, align 4
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call void @foo(ptr sret(%struct.S) %s)
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ret void
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}
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define void @test2() {
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entry:
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%t = alloca %struct.T, align 8
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call void @bar(ptr sret(%struct.T) %t)
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ret void
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}
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declare void @foo(ptr sret(%struct.S))
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declare void @bar(ptr sret(%struct.T))
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; MIR: name: test1
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; MIR: stack:
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; MIR-NEXT: - { id: 0, name: s, type: default, offset: 0, size: 1, alignment: 8,
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; MIR32: bb.0.entry:
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; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
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; MIR32-NEXT: renamable $r3 = ADDI %stack.0.s, 0
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; MIR32-NEXT: BL_NOP <mcsymbol .foo[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
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; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
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; MIR64: bb.0.entry:
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; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
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; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.s, 0
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; MIR64-NEXT: BL8_NOP <mcsymbol .foo[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
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; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
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; ASM-LABEL: .test1:
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; ASM32: stwu 1, -64(1)
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; ASM32-NEXT: addi 3, 1, 56
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; ASM32-NEXT: stw 0, 72(1)
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; ASM32-NEXT: bl .foo[PR]
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; ASM32-NEXT: nop
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; ASM32-NEXT: addi 1, 1, 64
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; ASM64: stdu 1, -128(1)
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; ASM64-NEXT: addi 3, 1, 120
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; ASM64-NEXT: std 0, 144(1)
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; ASM64-NEXT: bl .foo[PR]
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; ASM64-NEXT: nop
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; ASM64-NEXT: addi 1, 1, 128
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; MIR: name: test2
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; MIR: stack:
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; MIR-NEXT: - { id: 0, name: t, type: default, offset: 0, size: 24, alignment: 8,
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; MIR32: bb.0.entry:
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; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
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; MIR32-NEXT: renamable $r3 = ADDI %stack.0.t, 0
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; MIR32-NEXT: BL_NOP <mcsymbol .bar[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
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; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
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; MIR64: bb.0.entry:
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; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
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; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.t, 0
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; MIR64-NEXT: BL8_NOP <mcsymbol .bar[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
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; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
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; ASM-LABEL: .test2:
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; ASM32: stwu 1, -80(1)
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; ASM32-NEXT: addi 3, 1, 56
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; ASM32-NEXT: stw 0, 88(1)
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; ASM32-NEXT: bl .bar[PR]
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; ASM32-NEXT: nop
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; ASM32-NEXT: addi 1, 1, 80
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; ASM64: stdu 1, -144(1)
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; ASM64-NEXT: addi 3, 1, 120
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; ASM64-NEXT: std 0, 160(1)
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; ASM64-NEXT: bl .bar[PR]
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; ASM64-NEXT: nop
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; ASM64-NEXT: addi 1, 1, 144
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