eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
71 lines
2.6 KiB
LLVM
71 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -relocation-model=pic -verify-machineinstrs < %s \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s
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%struct.e.0.12.28.44.104.108.112.188 = type { i32 }
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%struct.t.1.13.29.45.105.109.113.189 = type { i64, i64 }
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@g = external local_unnamed_addr global %struct.e.0.12.28.44.104.108.112.188, align 4
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@aj = external thread_local local_unnamed_addr global %struct.t.1.13.29.45.105.109.113.189, align 8
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define void @_ZNK1q1rEv() local_unnamed_addr #0 align 2 {
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; CHECK-LABEL: _ZNK1q1rEv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
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; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu 1, -64(1)
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; CHECK-NEXT: std 0, 80(1)
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; CHECK-NEXT: lwz 30, 0(3)
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; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
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; CHECK-NEXT: ld 29, .LC0@toc@l(3)
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; CHECK-NEXT: addis 3, 2, aj@got@tlsgd@ha
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; CHECK-NEXT: addi 3, 3, aj@got@tlsgd@l
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; CHECK-NEXT: bl __tls_get_addr(aj@tlsgd)
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 4, 3, 8
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; CHECK-NEXT: .p2align 5
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; CHECK-NEXT: .LBB0_1: # %monotonic.i
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; CHECK-NEXT: #
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; CHECK-NEXT: lwz 5, 0(29)
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; CHECK-NEXT: andi. 5, 5, 255
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; CHECK-NEXT: bne 0, .LBB0_4
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; CHECK-NEXT: # %bb.2: # %for.cond.i
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; CHECK-NEXT: #
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; CHECK-NEXT: addi 30, 30, -1
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; CHECK-NEXT: cmplwi 30, 0
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; CHECK-NEXT: bne 0, .LBB0_1
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; CHECK-NEXT: # %bb.3:
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; CHECK-NEXT: mr 4, 3
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; CHECK-NEXT: .LBB0_4: # %if.end
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: std 3, 0(4)
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; CHECK-NEXT: addi 1, 1, 64
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
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; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, ptr undef, align 4
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br label %monotonic.i
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for.cond.i: ; preds = %monotonic.i
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%exitcond.not = icmp eq i32 %inc.i, %0
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br i1 %exitcond.not, label %if.end, label %monotonic.i
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monotonic.i: ; preds = %for.cond.i, %entry
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%i.018.i = phi i32 [ %inc.i, %for.cond.i ], [ 0, %entry ]
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%1 = load atomic i32, ptr @g monotonic, align 4
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%conv.i = trunc i32 %1 to i8
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%tobool.not.i = icmp eq i8 %conv.i, 0
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%inc.i = add nuw nsw i32 %i.018.i, 1
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br i1 %tobool.not.i, label %for.cond.i, label %if.end
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if.end: ; preds = %monotonic.i, %for.cond.i
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%.sink = phi ptr [ getelementptr inbounds (%struct.t.1.13.29.45.105.109.113.189, ptr @aj, i64 0, i32 1), %monotonic.i ], [ @aj, %for.cond.i ]
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store i64 1, ptr %.sink, align 8
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ret void
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}
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attributes #0 = { nounwind }
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