354e04554a
Only handle immediates that would produce an ADDI or ADDIW of Lo12 as the final instruction in their materialization. As the test change show this removes immediates that materialize with lui+addiw that is not the same as lui+addi.
380 lines
10 KiB
LLVM
380 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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; Check indexed and unindexed, sext, zext and anyext loads
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define dso_local i64 @lb(i8 *%a) nounwind {
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; RV64I-LABEL: lb:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lb a1, 1(a0)
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; RV64I-NEXT: lb a0, 0(a0)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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%1 = getelementptr i8, i8* %a, i32 1
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%2 = load i8, i8* %1
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%3 = sext i8 %2 to i64
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; the unused load will produce an anyext for selection
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%4 = load volatile i8, i8* %a
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ret i64 %3
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}
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define dso_local i64 @lh(i16 *%a) nounwind {
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; RV64I-LABEL: lh:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lh a1, 4(a0)
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; RV64I-NEXT: lh a0, 0(a0)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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%1 = getelementptr i16, i16* %a, i32 2
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%2 = load i16, i16* %1
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%3 = sext i16 %2 to i64
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; the unused load will produce an anyext for selection
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%4 = load volatile i16, i16* %a
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ret i64 %3
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}
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define dso_local i64 @lw(i32 *%a) nounwind {
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; RV64I-LABEL: lw:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lw a1, 12(a0)
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; RV64I-NEXT: lw a0, 0(a0)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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%1 = getelementptr i32, i32* %a, i32 3
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%2 = load i32, i32* %1
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%3 = sext i32 %2 to i64
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; the unused load will produce an anyext for selection
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%4 = load volatile i32, i32* %a
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ret i64 %3
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}
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define dso_local i64 @lbu(i8 *%a) nounwind {
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; RV64I-LABEL: lbu:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lbu a1, 4(a0)
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; RV64I-NEXT: lbu a0, 0(a0)
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; RV64I-NEXT: add a0, a1, a0
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; RV64I-NEXT: ret
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%1 = getelementptr i8, i8* %a, i32 4
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%2 = load i8, i8* %1
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%3 = zext i8 %2 to i64
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%4 = load volatile i8, i8* %a
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%5 = zext i8 %4 to i64
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%6 = add i64 %3, %5
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ret i64 %6
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}
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define dso_local i64 @lhu(i16 *%a) nounwind {
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; RV64I-LABEL: lhu:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lhu a1, 10(a0)
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; RV64I-NEXT: lhu a0, 0(a0)
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; RV64I-NEXT: add a0, a1, a0
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; RV64I-NEXT: ret
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%1 = getelementptr i16, i16* %a, i32 5
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%2 = load i16, i16* %1
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%3 = zext i16 %2 to i64
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%4 = load volatile i16, i16* %a
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%5 = zext i16 %4 to i64
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%6 = add i64 %3, %5
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ret i64 %6
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}
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define dso_local i64 @lwu(i32 *%a) nounwind {
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; RV64I-LABEL: lwu:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lwu a1, 24(a0)
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; RV64I-NEXT: lwu a0, 0(a0)
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; RV64I-NEXT: add a0, a1, a0
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; RV64I-NEXT: ret
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%1 = getelementptr i32, i32* %a, i32 6
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%2 = load i32, i32* %1
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%3 = zext i32 %2 to i64
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%4 = load volatile i32, i32* %a
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%5 = zext i32 %4 to i64
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%6 = add i64 %3, %5
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ret i64 %6
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}
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; Check indexed and unindexed stores
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define dso_local void @sb(i8 *%a, i8 %b) nounwind {
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; RV64I-LABEL: sb:
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; RV64I: # %bb.0:
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; RV64I-NEXT: sb a1, 0(a0)
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; RV64I-NEXT: sb a1, 7(a0)
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; RV64I-NEXT: ret
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store i8 %b, i8* %a
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%1 = getelementptr i8, i8* %a, i32 7
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store i8 %b, i8* %1
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ret void
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}
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define dso_local void @sh(i16 *%a, i16 %b) nounwind {
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; RV64I-LABEL: sh:
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; RV64I: # %bb.0:
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; RV64I-NEXT: sh a1, 0(a0)
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; RV64I-NEXT: sh a1, 16(a0)
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; RV64I-NEXT: ret
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store i16 %b, i16* %a
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%1 = getelementptr i16, i16* %a, i32 8
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store i16 %b, i16* %1
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ret void
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}
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define dso_local void @sw(i32 *%a, i32 %b) nounwind {
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; RV64I-LABEL: sw:
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; RV64I: # %bb.0:
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; RV64I-NEXT: sw a1, 0(a0)
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; RV64I-NEXT: sw a1, 36(a0)
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; RV64I-NEXT: ret
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store i32 %b, i32* %a
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%1 = getelementptr i32, i32* %a, i32 9
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store i32 %b, i32* %1
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ret void
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}
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; 64-bit loads and stores
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define dso_local i64 @ld(i64 *%a) nounwind {
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; RV64I-LABEL: ld:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ld a1, 80(a0)
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; RV64I-NEXT: ld a0, 0(a0)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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%1 = getelementptr i64, i64* %a, i32 10
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%2 = load i64, i64* %1
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%3 = load volatile i64, i64* %a
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ret i64 %2
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}
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define dso_local void @sd(i64 *%a, i64 %b) nounwind {
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; RV64I-LABEL: sd:
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; RV64I: # %bb.0:
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; RV64I-NEXT: sd a1, 0(a0)
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; RV64I-NEXT: sd a1, 88(a0)
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; RV64I-NEXT: ret
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store i64 %b, i64* %a
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%1 = getelementptr i64, i64* %a, i32 11
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store i64 %b, i64* %1
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ret void
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}
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; Check load and store to an i1 location
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define dso_local i64 @load_sext_zext_anyext_i1(i1 *%a) nounwind {
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; RV64I-LABEL: load_sext_zext_anyext_i1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lbu a1, 1(a0)
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; RV64I-NEXT: lbu a2, 2(a0)
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; RV64I-NEXT: lb a0, 0(a0)
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; RV64I-NEXT: sub a0, a2, a1
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; RV64I-NEXT: ret
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; sextload i1
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%1 = getelementptr i1, i1* %a, i32 1
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%2 = load i1, i1* %1
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%3 = sext i1 %2 to i64
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; zextload i1
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%4 = getelementptr i1, i1* %a, i32 2
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%5 = load i1, i1* %4
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%6 = zext i1 %5 to i64
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%7 = add i64 %3, %6
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; extload i1 (anyext). Produced as the load is unused.
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%8 = load volatile i1, i1* %a
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ret i64 %7
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}
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define dso_local i16 @load_sext_zext_anyext_i1_i16(i1 *%a) nounwind {
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; RV64I-LABEL: load_sext_zext_anyext_i1_i16:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lbu a1, 1(a0)
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; RV64I-NEXT: lbu a2, 2(a0)
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; RV64I-NEXT: lb a0, 0(a0)
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; RV64I-NEXT: sub a0, a2, a1
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; RV64I-NEXT: ret
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; sextload i1
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%1 = getelementptr i1, i1* %a, i32 1
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%2 = load i1, i1* %1
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%3 = sext i1 %2 to i16
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; zextload i1
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%4 = getelementptr i1, i1* %a, i32 2
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%5 = load i1, i1* %4
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%6 = zext i1 %5 to i16
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%7 = add i16 %3, %6
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; extload i1 (anyext). Produced as the load is unused.
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%8 = load volatile i1, i1* %a
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ret i16 %7
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}
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; Check load and store to a global
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@G = dso_local global i64 0
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define dso_local i64 @ld_sd_global(i64 %a) nounwind {
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; RV64I-LABEL: ld_sd_global:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a2, %hi(G)
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; RV64I-NEXT: ld a1, %lo(G)(a2)
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; RV64I-NEXT: addi a3, a2, %lo(G)
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; RV64I-NEXT: sd a0, %lo(G)(a2)
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; RV64I-NEXT: ld a2, 72(a3)
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; RV64I-NEXT: sd a0, 72(a3)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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%1 = load volatile i64, i64* @G
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store i64 %a, i64* @G
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%2 = getelementptr i64, i64* @G, i64 9
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%3 = load volatile i64, i64* %2
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store i64 %a, i64* %2
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ret i64 %1
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}
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define i64 @lw_near_local(i64* %a) {
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; RV64I-LABEL: lw_near_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi a0, a0, 2047
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; RV64I-NEXT: ld a0, 9(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 257
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%2 = load volatile i64, i64* %1
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ret i64 %2
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}
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define void @st_near_local(i64* %a, i64 %b) {
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; RV64I-LABEL: st_near_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi a0, a0, 2047
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; RV64I-NEXT: sd a1, 9(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 257
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store i64 %b, i64* %1
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ret void
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}
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define i64 @lw_sw_near_local(i64* %a, i64 %b) {
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; RV64I-LABEL: lw_sw_near_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi a2, a0, 2047
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; RV64I-NEXT: ld a0, 9(a2)
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; RV64I-NEXT: sd a1, 9(a2)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 257
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%2 = load volatile i64, i64* %1
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store i64 %b, i64* %1
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ret i64 %2
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}
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define i64 @lw_far_local(i64* %a) {
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; RV64I-LABEL: lw_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a1, 8
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; RV64I-NEXT: add a0, a0, a1
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; RV64I-NEXT: ld a0, -8(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 4095
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%2 = load volatile i64, i64* %1
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ret i64 %2
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}
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define void @st_far_local(i64* %a, i64 %b) {
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; RV64I-LABEL: st_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a2, 8
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; RV64I-NEXT: add a0, a0, a2
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; RV64I-NEXT: sd a1, -8(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 4095
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store i64 %b, i64* %1
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ret void
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}
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define i64 @lw_sw_far_local(i64* %a, i64 %b) {
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; RV64I-LABEL: lw_sw_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a2, 8
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; RV64I-NEXT: add a2, a0, a2
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; RV64I-NEXT: ld a0, -8(a2)
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; RV64I-NEXT: sd a1, -8(a2)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 4095
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%2 = load volatile i64, i64* %1
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store i64 %b, i64* %1
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ret i64 %2
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}
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; Make sure we don't fold the addiw into the load offset. The sign extend of the
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; addiw is required.
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define i64 @lw_really_far_local(i64* %a) {
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; RV64I-LABEL: lw_really_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a1, 524288
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; RV64I-NEXT: addiw a1, a1, -2048
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; RV64I-NEXT: add a0, a0, a1
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; RV64I-NEXT: ld a0, 0(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 268435200
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%2 = load volatile i64, i64* %1
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ret i64 %2
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}
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; Make sure we don't fold the addiw into the store offset. The sign extend of
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; the addiw is required.
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define void @st_really_far_local(i64* %a, i64 %b) {
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; RV64I-LABEL: st_really_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a2, 524288
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; RV64I-NEXT: addiw a2, a2, -2048
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; RV64I-NEXT: add a0, a0, a2
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; RV64I-NEXT: sd a1, 0(a0)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 268435200
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store i64 %b, i64* %1
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ret void
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}
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; Make sure we don't fold the addiw into the load/store offset. The sign extend
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; of the addiw is required.
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define i64 @lw_sw_really_far_local(i64* %a, i64 %b) {
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; RV64I-LABEL: lw_sw_really_far_local:
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; RV64I: # %bb.0:
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; RV64I-NEXT: lui a2, 524288
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; RV64I-NEXT: addiw a2, a2, -2048
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; RV64I-NEXT: add a2, a0, a2
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; RV64I-NEXT: ld a0, 0(a2)
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; RV64I-NEXT: sd a1, 0(a2)
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; RV64I-NEXT: ret
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%1 = getelementptr inbounds i64, i64* %a, i64 268435200
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%2 = load volatile i64, i64* %1
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store i64 %b, i64* %1
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ret i64 %2
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}
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%struct.quux = type { i32, [0 x i8] }
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; Make sure we don't remove the addi and fold the C from
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; (add (addi FrameIndex, C), X) into the store address.
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; FrameIndex cannot be the operand of an ADD. We must keep the ADDI.
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define void @addi_fold_crash(i64 %arg) nounwind {
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; RV64I-LABEL: addi_fold_crash:
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; RV64I: # %bb.0: # %bb
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: addi a1, sp, 4
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; RV64I-NEXT: add a0, a1, a0
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; RV64I-NEXT: sb zero, 0(a0)
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: call snork@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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bb:
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%tmp = alloca %struct.quux, align 4
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%tmp1 = getelementptr inbounds %struct.quux, %struct.quux* %tmp, i64 0, i32 1
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%tmp2 = getelementptr inbounds %struct.quux, %struct.quux* %tmp, i64 0, i32 1, i64 %arg
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store i8 0, i8* %tmp2, align 1
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call void @snork([0 x i8]* %tmp1)
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ret void
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}
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declare void @snork([0 x i8]*)
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