a5f1262332
This adds support for v256.32|64 scatter|gather isel. vp.gather|scatter and regular gather|scatter intrinsics are both lowered to the internal VVP layer. Splitting these ops on v512.32 is the subject of future patches. Reviewed By: kaz7 Differential Revision: https://reviews.llvm.org/D121288
61 lines
2.3 KiB
LLVM
61 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
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declare void @llvm.masked.scatter.v256i64.v256p0i64(<256 x i64>, <256 x i64*>, i32 immarg, <256 x i1>) #0
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; Function Attrs: nounwind
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define fastcc void @vec_mscatter_v256i64(<256 x i64> %V, <256 x i64*> %P, <256 x i1> %M) {
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; CHECK-LABEL: vec_mscatter_v256i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vsc %v0, %v1, 0, 0
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; CHECK-NEXT: b.l.t (, %s10)
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call void @llvm.masked.scatter.v256i64.v256p0i64(<256 x i64> %V, <256 x i64*> %P, i32 4, <256 x i1> %M)
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ret void
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}
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declare void @llvm.masked.scatter.v256f64.v256p0f64(<256 x double>, <256 x double*>, i32 immarg, <256 x i1>) #0
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; Function Attrs: nounwind
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define fastcc void @vec_mscatter_v256f64(<256 x double> %V, <256 x double*> %P, <256 x i1> %M) {
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; CHECK-LABEL: vec_mscatter_v256f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vsc %v0, %v1, 0, 0
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; CHECK-NEXT: b.l.t (, %s10)
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call void @llvm.masked.scatter.v256f64.v256p0f64(<256 x double> %V, <256 x double*> %P, i32 4, <256 x i1> %M)
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ret void
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}
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declare void @llvm.masked.scatter.v256f32.v256p0f32(<256 x float>, <256 x float*>, i32 immarg, <256 x i1>) #0
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; Function Attrs: nounwind
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define fastcc void @vec_mscatter_v256f32(<256 x float> %V, <256 x float*> %P, <256 x i1> %M) {
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; CHECK-LABEL: vec_mscatter_v256f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vscu %v0, %v1, 0, 0
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; CHECK-NEXT: b.l.t (, %s10)
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call void @llvm.masked.scatter.v256f32.v256p0f32(<256 x float> %V, <256 x float*> %P, i32 4, <256 x i1> %M)
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ret void
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}
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declare void @llvm.masked.scatter.v256i32.v256p0i32(<256 x i32>, <256 x i32*>, i32 immarg, <256 x i1>) #0
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; Function Attrs: nounwind
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define fastcc void @vec_mscatter_v256i32(<256 x i32> %V, <256 x i32*> %P, <256 x i1> %M) {
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; CHECK-LABEL: vec_mscatter_v256i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vscl %v0, %v1, 0, 0
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; CHECK-NEXT: b.l.t (, %s10)
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call void @llvm.masked.scatter.v256i32.v256p0i32(<256 x i32> %V, <256 x i32*> %P, i32 4, <256 x i1> %M)
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ret void
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}
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attributes #0 = { argmemonly nounwind readonly willreturn }
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