2a721374ae
Following some recent discussions, this changes the representation
of callbrs in IR. The current blockaddress arguments are replaced
with `!` label constraints that refer directly to callbr indirect
destinations:
; Before:
%res = callbr i8* asm "", "=r,r,i"(i8* %x, i8* blockaddress(@test8, %foo))
to label %asm.fallthrough [label %foo]
; After:
%res = callbr i8* asm "", "=r,r,!i"(i8* %x)
to label %asm.fallthrough [label %foo]
The benefit of this is that we can easily update the successors of
a callbr, without having to worry about also updating blockaddress
references. This should allow us to remove some limitations:
* Allow unrolling/peeling/rotation of callbr, or any other
clone-based optimizations
(https://github.com/llvm/llvm-project/issues/41834)
* Allow duplicate successors
(https://github.com/llvm/llvm-project/issues/45248)
This is just the IR representation change though, I will follow up
with patches to remove limtations in various transformation passes
that are no longer needed.
Differential Revision: https://reviews.llvm.org/D129288
56 lines
1.7 KiB
LLVM
56 lines
1.7 KiB
LLVM
; RUN: opt -inline -S < %s | FileCheck %s
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; RUN: opt -passes='cgscc(inline)' -S < %s | FileCheck %s
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; RUN: opt -passes='module-inline' -S < %s | FileCheck %s
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define dso_local i32 @main() #0 {
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%1 = alloca i32, align 4
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store i32 0, i32* %1, align 4
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%2 = call i32 @t32(i32 0)
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ret i32 %2
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}
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define internal i32 @t32(i32) #0 {
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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store i32 %0, i32* %3, align 4
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%4 = load i32, i32* %3, align 4
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callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1
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to label %5 [label %7, label %6]
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; <label>:5: ; preds = %1
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store i32 0, i32* %2, align 4
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br label %8
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; <label>:6: ; preds = %1
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store i32 1, i32* %2, align 4
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br label %8
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; <label>:7: ; preds = %1
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store i32 2, i32* %2, align 4
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br label %8
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; <label>:8: ; preds = %7, %6, %5
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%9 = load i32, i32* %2, align 4
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ret i32 %9
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}
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; Check that @t32 no longer exists after inlining, as it has now been inlined
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; into @main.
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; CHECK-NOT: @t32
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; CHECK: define dso_local i32 @main
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; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %6)
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; CHECK: to label %7 [label %9, label %8]
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; CHECK: 7:
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; CHECK-NEXT: store i32 0, i32* %1, align 4
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; CHECK-NEXT: br label %t32.exit
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; CHECK: 8:
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; CHECK-NEXT: store i32 1, i32* %1, align 4
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; CHECK-NEXT: br label %t32.exit
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; CHECK: 9:
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; CHECK-NEXT: store i32 2, i32* %1, align 4
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; CHECK-NEXT: br label %t32.exit
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; CHECK: t32.exit:
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; CHECK-NEXT: %10 = load i32, i32* %1, align 4
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; CHECK: ret i32 %10
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