65ae09eeb6
rldimi is 64-bit instruction, so the corresponding builtin should not be available in 32-bit mode. Rotate amount should be in range and cases when mask is zero needs special handling. This change also swaps the first and second operands of rldimi/rlwimi to match previous behavior. For masks not ending at bit 63-SH, rotation will be inserted before rldimi.
143 lines
3.8 KiB
LLVM
143 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix -mcpu=pwr8 | FileCheck %s
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define i64 @rldimi1(i64 %a) {
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; CHECK-LABEL: rldimi1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rldimi 3, 3, 8, 0
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; CHECK-NEXT: blr
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entry:
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%x0 = shl i64 %a, 8
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%x1 = and i64 %a, 255
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%x2 = or i64 %x0, %x1
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ret i64 %x2
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}
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define i64 @rldimi2(i64 %a) {
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; CHECK-LABEL: rldimi2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mr 4, 3
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; CHECK-NEXT: rlwimi 4, 3, 8, 16, 23
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; CHECK-NEXT: rlwimi 4, 3, 16, 8, 15
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; CHECK-NEXT: rldimi 4, 3, 24, 0
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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entry:
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%x0 = shl i64 %a, 8
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%x1 = and i64 %a, 255
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%x2 = or i64 %x0, %x1
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%x3 = shl i64 %x2, 16
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%x4 = and i64 %x2, 65535
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%x5 = or i64 %x3, %x4
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ret i64 %x5
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}
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define i64 @rldimi3(i64 %a) {
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; CHECK-LABEL: rldimi3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rotldi 4, 3, 32
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; CHECK-NEXT: rlwimi 4, 3, 0, 24, 31
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; CHECK-NEXT: rlwimi 4, 3, 8, 16, 23
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; CHECK-NEXT: rlwimi 4, 3, 16, 8, 15
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; CHECK-NEXT: rlwimi 4, 3, 24, 0, 7
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; CHECK-NEXT: rldimi 4, 3, 40, 16
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; CHECK-NEXT: rldimi 4, 3, 48, 8
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; CHECK-NEXT: rldimi 4, 3, 56, 0
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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entry:
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%0 = shl i64 %a, 8
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%1 = and i64 %a, 255
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%2 = or i64 %0, %1
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%3 = shl i64 %2, 16
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%4 = and i64 %2, 65535
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%5 = or i64 %3, %4
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%6 = shl i64 %5, 32
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%7 = and i64 %5, 4294967295
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%8 = or i64 %6, %7
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ret i64 %8
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}
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define i64 @rldimi4(i64 %a) {
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; CHECK-LABEL: rldimi4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rldimi 3, 3, 8, 0
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; CHECK-NEXT: rldimi 3, 3, 16, 0
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; CHECK-NEXT: rldimi 3, 3, 32, 0
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; CHECK-NEXT: blr
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%r1 = call i64 @llvm.ppc.rldimi(i64 %a, i64 %a, i32 8, i64 -256)
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%r2 = call i64 @llvm.ppc.rldimi(i64 %r1, i64 %r1, i32 16, i64 -65536)
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%r3 = call i64 @llvm.ppc.rldimi(i64 %r2, i64 %r2, i32 32, i64 -4294967296)
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ret i64 %r3
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}
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define i64 @rldimi5(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rldimi 4, 3, 8, 40
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 8, i64 16776960) ; 0xffff << 8
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ret i64 %r
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}
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define i64 @rldimi6(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotldi 3, 3, 1
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; CHECK-NEXT: rldimi 4, 3, 7, 41
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 8, i64 8388480) ; 0xffff << 7
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ret i64 %r
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}
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define i64 @rldimi7(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotldi 3, 3, 63
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; CHECK-NEXT: rldimi 4, 3, 9, 39
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 8, i64 33553920) ; 0xffff << 9
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ret i64 %r
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}
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define i64 @rldimi8(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 0, i64 0)
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ret i64 %r
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}
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define i64 @rldimi9(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 63, i64 0)
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ret i64 %r
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}
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define i64 @rldimi10(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 0, i64 -1)
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ret i64 %r
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}
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define i64 @rldimi11(i64 %a, i64 %b) {
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; CHECK-LABEL: rldimi11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rotldi 3, 3, 8
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; CHECK-NEXT: blr
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%r = call i64 @llvm.ppc.rldimi(i64 %a, i64 %b, i32 8, i64 -1)
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ret i64 %r
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}
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declare i64 @llvm.ppc.rldimi(i64, i64, i32 immarg, i64 immarg)
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