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Diana Picus cf044647c4 [ARM GlobalISel] Add inst selector tests for G_FMA 
We don't yet match all the patterns involving G_FMA. Add tests for some
of the ones that we do match.

llvm-svn: 322368
2018-01-12 12:44:36 +00:00
..
GlobalISel
[ARM GlobalISel] Add inst selector tests for G_FMA
2018-01-12 12:44:36 +00:00
Windows
[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.
2018-01-10 00:56:48 +00:00
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
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2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
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2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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2010-05-21-BuildVector.ll
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2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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2010-08-04-EHCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-21-OptCmpBug.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll
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2010-12-07-PEIBug.ll
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2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
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2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
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2011-06-09-TailCallByVal.ll
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2011-06-16-TailCallByVal.ll
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2011-06-29-MergeGlobalsAlign.ll
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2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
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2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll
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2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
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2011-10-26-ExpandUnalignedLoadCrash.ll
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2011-10-26-memset-inline.ll
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2011-10-26-memset-with-neon.ll
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2011-11-07-PromoteVectorLoadStore.ll
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2011-11-09-BitcastVectorDouble.ll
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2011-11-09-IllegalVectorFPIntConvert.ll
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2011-11-14-EarlyClobber.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
2011-11-28-DAGCombineBug.ll
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2011-11-29-128bitArithmetics.ll
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2011-11-30-MergeAlignment.ll
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2011-12-14-machine-sink.ll
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2011-12-19-sjlj-clobber.ll
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2012-01-23-PostRA-LICM.ll
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2012-01-24-RegSequenceLiveRange.ll
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2012-01-26-CoalescerBug.ll
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2012-01-26-CopyPropKills.ll
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2012-02-01-CoalescerBug.ll
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2012-03-05-FPSCR-bug.ll
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2012-03-13-DAGCombineBug.ll
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2012-03-26-FoldImmBug.ll
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2012-04-02-TwoAddrInstrCrash.ll
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2012-04-10-DAGCombine.ll
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2012-04-24-SplitEHCriticalEdge.ll
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2012-05-04-vmov.ll
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2012-05-10-PreferVMOVtoVDUP32.ll
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2012-05-29-TailDupBug.ll
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2012-06-12-SchedMemLatency.ll
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2012-08-04-DtripleSpillReload.ll
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2012-08-08-legalize-unaligned.ll
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2012-08-09-neon-extload.ll
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2012-08-13-bfi.ll
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2012-08-23-legalize-vmull.ll
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2012-08-27-CopyPhysRegCrash.ll
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2012-08-30-select.ll
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2012-09-18-ARMv4ISelBug.ll
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2012-09-25-InlineAsmScalarToVectorConv2.ll
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2012-09-25-InlineAsmScalarToVectorConv.ll
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2012-10-04-AAPCS-byval-align8.ll
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2012-10-04-FixedFrame-vs-byval.ll
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2012-10-04-LDRB_POST_IMM-Crash.ll
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2012-10-18-PR14099-ByvalFrameAddress.ll
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2012-11-14-subs_carry.ll
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2013-01-21-PR14992.ll
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2013-02-27-expand-vfma.ll
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2013-04-05-Small-ByVal-Structs-PR15293.ll
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2013-04-16-AAPCS-C4-vs-VFP.ll
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2013-04-16-AAPCS-C5-vs-VFP.ll
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2013-04-18-load-overlap-PR14824.ll
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2013-04-21-AAPCS-VA-C.1.cp.ll
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2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
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2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
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2013-05-05-IfConvertBug.ll
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2013-05-07-ByteLoadSameAddress.ll
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2013-05-13-AAPCS-byval-padding2.ll
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2013-05-13-AAPCS-byval-padding.ll
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2013-05-13-DAGCombiner-undef-mask.ll
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2013-05-31-char-shift-crash.ll
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2013-06-03-ByVal-2Kbytes.ll
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2013-07-29-vector-or-combine.ll
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2013-10-11-select-stalls.ll
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2013-11-08-inline-asm-neon-array.ll
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2014-01-09-pseudo_expand_implicit_reg.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
2014-02-05-vfp-regs-after-stack.ll
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2014-02-21-byval-reg-split-alignment.ll
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2014-05-14-DwarfEHCrash.ll
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2014-07-18-earlyclobber-str-post.ll
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2014-08-04-muls-it.ll
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2015-01-21-thumbv4t-ldstr-opt.ll
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2016-05-01-RegScavengerAssert.ll
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2016-08-24-ARM-LDST-dbginfo-bug.ll
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a15-mla.ll
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a15-partial-update.ll
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a15-SD-dep.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
a15.ll
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aapcs-hfa-code.ll
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aapcs-hfa.ll
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acle-intrinsics-v5.ll
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acle-intrinsics.ll
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addrmode.ll
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addrspacecast.ll
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addsubcarry-promotion.ll
[DAG] Promote ADDCARRY / SUBCARRY
2017-12-13 10:45:21 +00:00
adv-copy-opt.ll
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aeabi-read-tp.ll
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aggregate-padding.ll
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alias_store.ll
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aliases.ll
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align-sp-adjustment.ll
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align.ll
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alloc-no-stack-realign.ll
[DAGCombine] Disable finding better chains for stores at O0
2017-11-28 04:07:59 +00:00
alloca-align.ll
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alloca.ll
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and-cmpz.ll
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and-load-combine.ll
[DAGCombine] Fix for PR37563
2018-01-05 08:47:23 +00:00
apcs-vfp.ll
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arg-copy-elide.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm32-round-conv.ll
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arm32-rounding.ll
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arm-abi-attr.ll
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arm-and-tst-peephole.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
arm-asm.ll
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arm-eabi.ll
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arm-frame-lowering-no-terminator.ll
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arm-frameaddr.ll
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arm-insert-subvector.ll
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arm-macho-tail.ll
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arm-modifier.ll
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arm-negative-stride.ll
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arm-position-independence-jump-table.ll
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arm-position-independence.ll
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arm-returnaddr.ll
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arm-shrink-wrapping-linux.ll
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arm-shrink-wrapping.ll
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arm-storebytesmerge.ll
[ARM][AArch64][DAG] Reenable post-legalize store merge
2017-12-06 15:30:13 +00:00
arm-ttype-target2.ll
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ARMLoadStoreDBG.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
armv4.ll
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atomic-64bit.ll
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atomic-cmp.ll
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atomic-cmpxchg.ll
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atomic-load-store.ll
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atomic-op.ll
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atomic-ops-v8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomicrmw_minmax.ll
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available_externally.ll
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avoid-cpsr-rmw.ll
[SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking.
2017-12-21 01:22:13 +00:00
bfc.ll
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bfi.ll
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bfx.ll
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bic.ll
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bicZext.ll
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big-endian-eh-unwind.ll
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big-endian-neon-bitconv.ll
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big-endian-neon-extend.ll
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big-endian-neon-trunc-store.ll
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big-endian-ret-f64.ll
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big-endian-vector-callee.ll
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big-endian-vector-caller.ll
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bit-reverse-to-rbit.ll
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bits.ll
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bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap16.ll
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bswap-inline-asm.ll
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build-attributes-encoding.s
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build-attributes-fn-attr0.ll
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build-attributes-fn-attr1.ll
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build-attributes-fn-attr2.ll
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build-attributes-fn-attr3.ll
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build-attributes-fn-attr4.ll
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build-attributes-fn-attr5.ll
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build-attributes-fn-attr6.ll
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build-attributes-optimization-minsize.ll
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build-attributes-optimization-mixed.ll
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build-attributes-optimization-optnone.ll
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build-attributes-optimization-optsize.ll
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build-attributes-optimization.ll
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build-attributes.ll
[ARM] Add support for armv7e-m to the .arch directive
2017-11-29 10:12:15 +00:00
bx_fold.ll
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byval_load_align.ll
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byval-align.ll
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cache-intrinsic.ll
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call_nolink.ll
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call-noret-minsize.ll
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call-noret.ll
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call-tc.ll
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call.ll
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carry.ll
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cdp2.ll
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cdp.ll
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cfi-alignment.ll
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clang-section.ll
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clz.ll
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cmn.ll
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cmp1-peephole-thumb.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
cmp2-peephole-thumb.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
cmp.ll
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cmpxchg-idioms.ll
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cmpxchg-O0-be.ll
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cmpxchg-O0.ll
…
cmpxchg-weak.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
coalesce-dbgvalue.ll
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coalesce-subregs.ll
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code-placement.ll
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combine-movc-sub.ll
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combine-vmovdrr.ll
…
commute-movcc.ll
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compare-call.ll
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constant-island-crash.ll
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constant-islands-cfg.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
constant-islands.ll
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constantfp.ll
…
constantpool-align.ll
…
constantpool-promote-dbg.ll
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constantpool-promote-duplicate.ll
…
constantpool-promote-ldrh.ll
…
constantpool-promote.ll
…
constants.ll
…
copy-cpsr.ll
…
copy-paired-reg.ll
…
cortex-a57-misched-alu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-basic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-ldm-wrback.ll
…
cortex-a57-misched-ldm.ll
…
cortex-a57-misched-stm-wrback.ll
…
cortex-a57-misched-stm.ll
…
cortex-a57-misched-vadd.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vfma.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vldm-wrback.ll
…
cortex-a57-misched-vldm.ll
…
cortex-a57-misched-vstm-wrback.ll
…
cortex-a57-misched-vstm.ll
…
cortex-a57-misched-vsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortexr52-misched-basic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
crash-greedy-v6.ll
…
crash-greedy.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
crash-O0.ll
…
crash-on-pow2-shufflevector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
crash-shufflevector.ll
…
crash.ll
…
crc32.ll
…
cse-call.ll
…
cse-flags.ll
…
cse-ldrlit.ll
…
cse-libcalls.ll
…
ctor_order.ll
…
ctors_dtors.ll
…
cttz_vector.ll
…
cttz.ll
…
cxx-tlscc.ll
…
dag-combine-ldst.ll
…
dagcombine-anyexttozeroext.ll
…
dagcombine-concatvector.ll
…
darwin-eabi.ll
…
darwin-tls-preserved.ll
…
darwin-tls.ll
…
data-in-code-annotations.ll
…
dbg-range-extension.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
dbg.ll
…
DbgValueOtherTargets.test
…
debug-frame-large-stack.ll
…
debug-frame-no-debug.ll
…
debug-frame-vararg.ll
…
debug-frame.ll
…
debug-info-arg.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
debug-info-blocks.ll
…
debug-info-branch-folding.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
debug-info-d16-reg.ll
…
debug-info-no-frame.ll
…
debug-info-qreg.ll
[DebugInfo] Align comments in debug_loc section
2018-01-05 22:20:30 +00:00
debug-info-s16-reg.ll
…
debug-info-sreg2.ll
…
debug-segmented-stacks.ll
…
debugtrap.ll
…
default-float-abi.ll
…
default-reloc.ll
…
deprecated-asm.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
deps-fix.ll
…
disable-fp-elim.ll
…
disable-tail-calls.ll
…
div.ll
…
divmod-eabi.ll
…
divmod-hwdiv.ll
…
divmod.ll
…
domain-conv-vmovs.ll
…
dsp-mlal.ll
[ARM] Add codegen for SMMULR, SMMLAR and SMMLSR
2018-01-12 09:24:41 +00:00
dwarf-eh.ll
…
dwarf-unwind.ll
…
dyn-stackalloc.ll
…
early-cfi-sections.ll
…
eh-dispcont.ll
…
eh-resume-darwin.ll
…
ehabi-filters.ll
…
ehabi-handlerdata-nounwind.ll
…
ehabi-handlerdata.ll
…
ehabi-no-landingpad.ll
…
ehabi-unwind.ll
…
ehabi.ll
[ARM] Use dwarf exception handling on MinGW
2017-11-17 08:04:40 +00:00
elf-lcomm-align.ll
…
emit-big-cst.ll
…
emutls1.ll
…
emutls_generic.ll
[ARM] Allow using emulated tls on platforms other than ELF
2017-12-04 09:08:55 +00:00
emutls.ll
…
execute-only-big-stack-frame.ll
…
execute-only-section.ll
…
execute-only.ll
…
expand-pseudos.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
extload-knownzero.ll
…
extloadi1.ll
…
fabs-neon.ll
…
fabs-to-bfc.ll
…
fabss.ll
…
fadds.ll
…
fast-isel-align.ll
…
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-br-phi.ll
…
fast-isel-call-multi-reg-return.ll
…
fast-isel-call.ll
…
fast-isel-cmp-imm.ll
…
fast-isel-conversion.ll
…
fast-isel-crash2.ll
…
fast-isel-crash.ll
…
fast-isel-deadcode.ll
…
fast-isel-ext.ll
…
fast-isel-fold.ll
…
fast-isel-frameaddr.ll
…
fast-isel-GEP-coalesce.ll
…
fast-isel-icmp.ll
…
fast-isel-indirectbr.ll
…
fast-isel-inline-asm.ll
…
fast-isel-intrinsic.ll
…
fast-isel-ldr-str-arm.ll
…
fast-isel-ldr-str-thumb-neg-index.ll
…
fast-isel-ldrh-strh-arm.ll
…
fast-isel-load-store-verify.ll
…
fast-isel-mvn.ll
…
fast-isel-pic.ll
…
fast-isel-pie.ll
…
fast-isel-pred.ll
…
fast-isel-redefinition.ll
…
fast-isel-remat-same-constant.ll
…
fast-isel-ret.ll
…
fast-isel-select.ll
…
fast-isel-shift-materialize.ll
…
fast-isel-shifter.ll
…
fast-isel-static.ll
…
fast-isel-update-valuemap-for-extract.ll
…
fast-isel-vaddd.ll
…
fast-isel-vararg.ll
…
fast-isel.ll
…
fast-tail-call.ll
…
fastcc-vfp.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-thumb-litpool.ll
…
fcopysign.ll
…
fdivs.ll
…
fence-singlethread.ll
…
fixunsdfdi.ll
…
flag-crash.ll
…
float-helpers.s
…
floorf.ll
…
fmacs.ll
…
fmdrr-fmrrd.ll
…
fmscs.ll
…
fmuls.ll
…
fnattr-trap.ll
…
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll
…
fnmul.ll
…
fnmuls.ll
…
fold-const.ll
…
fold-stack-adjust.ll
…
formal.ll
…
fp16-args.ll
…
fp16-promote.ll
[ARM][AArch64][DAG] Reenable post-legalize store merge
2017-12-06 15:30:13 +00:00
fp16-v3.ll
…
fp16.ll
…
fp_convert.ll
…
fp-arg-shuffle.ll
…
fp-fast.ll
…
fp-only-sp.ll
…
fp.ll
…
fparith.ll
…
fpcmp_ueq.ll
…
fpcmp-f64-neon-opt.ll
…
fpcmp-opt.ll
…
fpcmp.ll
…
fpconsts.ll
…
fpconv.ll
…
fpmem.ll
…
fpoffset_overflow.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
fpow.ll
…
fpowi.ll
…
fpscr-intrinsics.ll
…
fptoint.ll
…
frame-register.ll
…
fsubs.ll
…
func-argpassing-endian.ll
…
fusedMAC.ll
…
gep-optimization.ll
…
ghc-tcreturn-lowered.ll
…
global-merge-1.ll
…
global-merge-addrspace.ll
…
global-merge-external.ll
…
global-merge.ll
…
globals.ll
…
gpr-paired-spill-thumbinst.ll
…
gpr-paired-spill.ll
…
gv-stubs-crash.ll
…
half.ll
…
hardfloat_neon.ll
…
hello.ll
…
hfa-in-contiguous-registers.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis.ll
…
hints.ll
…
i1.ll
…
iabs.ll
…
ifconv-kills.ll
…
ifconv-regmask.ll
…
ifcvt1.ll
…
ifcvt2.ll
…
ifcvt3.ll
…
ifcvt4.ll
…
ifcvt5.ll
…
ifcvt6.ll
…
ifcvt7.ll
…
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
…
ifcvt11.ll
…
ifcvt12.ll
…
ifcvt-branch-weight-bug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ifcvt-branch-weight.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ifcvt-callback.ll
…
ifcvt-dead-def.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
ifcvt-iter-indbr.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ifcvt-regmask-noreturn.ll
…
illegal-bitfield-loadstore.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
illegal-vector-bitcast.ll
…
imm-peephole-arm.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
imm-peephole-thumb.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
imm.ll
…
immcost.ll
…
indirect-hidden.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
indirect-reg-input.ll
…
indirectbr-2.ll
…
indirectbr-3.ll
…
indirectbr.ll
…
inline-diagnostics.ll
…
inlineasm2.ll
…
inlineasm3.ll
…
inlineasm4.ll
…
inlineasm-64bit.ll
…
inlineasm-global.ll
…
inlineasm-imm-arm.ll
…
inlineasm-imm-thumb2.ll
…
inlineasm-imm-thumb.ll
…
inlineasm-ldr-pseudo.ll
…
inlineasm-switch-mode-oneway-from-arm.ll
…
inlineasm-switch-mode-oneway-from-thumb.ll
…
inlineasm-switch-mode.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
inlineasm.ll
[ARM] 't' asm constraint should accept i32
2017-11-16 23:38:17 +00:00
insn-sched1.ll
…
int-to-fp.ll
…
integer_insertelement.ll
…
interrupt-attr.ll
…
interval-update-remat.ll
…
interwork.ll
…
intrinsics-coprocessor.ll
…
intrinsics-crypto.ll
…
intrinsics-memory-barrier.ll
…
intrinsics-overflow.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
intrinsics-v8.ll
…
invalid-target.ll
…
invalidated-save-point.ll
…
invoke-donothing-assert.ll
…
isel-v8i32-crash.ll
…
ispositive.ll
…
jump-table-islands-split.ll
…
jump-table-islands.ll
…
jump-table-tbh.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
jumptable-label.ll
…
krait-cpu-div-attribute.ll
…
large-stack.ll
…
ldaex-stlex.ll
…
ldc2l.ll
…
ldm-base-writeback.ll
…
ldm-stm-base-materialization.ll
…
ldm-stm-i256.ll
…
ldm.ll
…
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
…
ldrd-memoper.ll
…
ldrd.ll
…
ldst-f32-2-i32.ll
…
ldstrex-m.ll
…
ldstrex.ll
…
legalize-unaligned-load.ll
…
lit.local.cfg
…
litpool-licm.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
load_i1_select.ll
…
load_store_multiple.ll
[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.
2017-12-14 18:06:25 +00:00
load_store_opt_kill.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
load-address-masked.ll
…
load-arm.ll
…
load-combine-big-endian.ll
…
load-combine.ll
…
load-global2.ll
[arm] Fix Unnecessary reloads from GOT.
2017-11-13 20:45:38 +00:00
load-global.ll
…
load-store-flags.ll
…
load.ll
…
local-call.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
log2_not_readnone.ll
…
long_shift.ll
…
long-setcc.ll
[ARM] Add tests for D34515
2017-12-15 09:24:46 +00:00
long.ll
…
longMAC.ll
…
loopvectorize_pr33804.ll
…
lowerMUL-newload.ll
…
lsr-code-insertion.ll
…
lsr-icmp-imm.ll
…
lsr-scale-addr-mode.ll
…
lsr-unfolded-offset.ll
…
machine-copyprop.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
machine-cse-cmp.ll
…
machine-licm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
macho-extern-hidden.ll
…
macho-frame-offset.ll
…
MachO-subtypes.ll
…
mature-mc-support.ll
…
mem.ll
…
memcpy-inline.ll
…
memcpy-ldm-stm.ll
…
memcpy-no-inline.ll
…
memfunc.ll
…
memset-inline.ll
…
MergeConsecutiveStores.ll
…
metadata-default.ll
…
metadata-short-enums.ll
…
metadata-short-wchar.ll
…
minmax.ll
…
minsize-call-cse.ll
…
minsize-imms.ll
…
minsize-litpools.ll
…
misched-copy-arm.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
misched-fp-basic.ll
…
misched-fusion-aes.ll
…
misched-int-basic-thumb2.mir
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
misched-int-basic.mir
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
mls.ll
…
movcc-double.ll
…
movt-movw-global.ll
…
movt.ll
…
msr-it-block.ll
…
mul_const.ll
…
mul.ll
…
mulhi.ll
…
mult-alt-generic-arm.ll
…
mvn.ll
…
named-reg-alloc.ll
…
named-reg-notareg.ll
…
negate-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negative-offset.ll
…
neon_arith1.ll
…
neon_cmp.ll
…
neon_div.ll
…
neon_fpconv.ll
…
neon_ld1.ll
…
neon_ld2.ll
…
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
…
neon_vabs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
neon_vshl_minint.ll
…
neon-fma.ll
…
neon-spfp.ll
…
neon-v8.1a.ll
…
nest-register.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
no_redundant_trunc_for_cmp.ll
…
no-arm-mode.ll
…
no-cfi.ll
…
no-cmov2bfi.ll
…
no-fpscr-liveness.ll
…
no-fpu.ll
…
no-tail-call.ll
…
none-macho-v4t.ll
…
none-macho.ll
…
noopt-dmb-v7.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
nop_concat_vectors.ll
…
noreturn.ll
…
null-streamer.ll
…
opt-shuff-tstore.ll
…
optimize-dmbs-v7.ll
…
optselect-regclass.ll
…
out-of-registers.ll
…
pack.ll
…
peephole-bitcast.ll
…
peephole-phi.mir
PeepholeOptimizer: Fix for vregs without defs
2018-01-11 22:30:43 +00:00
pei-swiftself.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
phi.ll
…
pic.ll
…
pie.ll
…
plt-relative-reloc.ll
…
popcnt.ll
…
pr3502.ll
…
pr13249.ll
…
pr18364-movw.ll
…
pr25317.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
pr25838.ll
…
pr26669.ll
…
pr32545.ll
…
pr32578.ll
ARM: Fix PR32578
2017-11-28 01:17:52 +00:00
pr34045-2.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr34045.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr35103.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
PR15053.ll
…
PR35379.ll
[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
2018-01-08 14:47:19 +00:00
preferred-align.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
prefetch.ll
…
prera-ldst-aliasing.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
prera-ldst-insertpt.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
print-memb-operand.ll
…
private.ll
…
rbit.ll
…
readcyclecounter.ll
…
readtp.ll
…
reg_sequence.ll
…
regpair_hint_phys.ll
…
rem_crash.ll
…
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_sret_vector.ll
…
ret_void.ll
…
returned-ext.ll
…
returned-trunc-tail-calls.ll
…
rev.ll
…
ror.ll
…
rotate.ll
…
saxpy10-a9.ll
…
sbfx.ll
…
scavenging.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
sched-it-debug-nodes.mir
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
section-name.ll
…
section.ll
…
segmented-stacks-dynamic.ll
…
segmented-stacks.ll
…
select_const.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
select_xform.ll
…
select-imm.ll
[ARM] Add tests for D34515
2017-12-15 09:24:46 +00:00
select-undef.ll
…
select.ll
…
setcc-logic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setcc-type-mismatch.ll
…
setjmp_longjmp.ll
…
shift-combine.ll
[DAGCombine] Revert r321259
2017-12-22 08:36:25 +00:00
shift-i64.ll
…
shifter_operand.ll
…
shuffle.ll
…
sincos.ll
…
single-issue-r52.mir
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
sjlj-prepare-critical-edge.ll
…
sjljeh-swifterror.ll
…
sjljehprepare-lower-empty-struct.ll
…
smml.ll
[ARM] Fix erroneous availability of SMMLS for Armv7-M
2018-01-12 09:21:09 +00:00
smul.ll
…
softfp-fabs-fneg.ll
…
space-directive.ll
…
special-reg-acore.ll
…
special-reg-mcore.ll
…
special-reg-v8m-base.ll
…
special-reg-v8m-main.ll
…
special-reg.ll
…
spill-q.ll
…
ssat-lower.ll
…
ssat-upper.ll
…
ssat-v4t.ll
…
ssat.ll
…
ssp-data-layout.ll
…
stack_guard_remat.ll
…
stack-alignment.ll
…
stack-frame.ll
…
stack-protector-bmovpcb_call.ll
…
stackpointer.ll
…
static-addr-hoisting.ll
…
stc2.ll
…
stm.ll
…
str_post.ll
…
str_pre-2.ll
…
str_pre.ll
…
str_trunc.ll
…
struct_byval_arm_t1_t2.ll
…
struct_byval.ll
…
struct-byval-frame-index.ll
…
su-addsub-overflow.ll
[ARM] Optimize {s,u}{add,sub}.with.overflow.
2017-12-20 22:25:39 +00:00
sub-cmp-peephole.ll
…
sub.ll
…
subreg-remat.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
subtarget-features-long-calls.ll
…
subtarget-no-movt.ll
…
swift-atomics.ll
…
swift-ios.ll
…
swift-return.ll
…
swift-vldm.ll
…
swifterror.ll
…
swiftself.ll
…
switch-minsize.ll
…
sxt_rot.ll
…
t2-imm.ll
…
t2-shrink-ldrpost.ll
…
t2abs-killflags.ll
…
tail-call-builtin.ll
…
tail-call-float.ll
…
tail-call-weak.ll
…
tail-call.ll
…
tail-dup-bundle.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
tail-dup-kill-flags.ll
…
tail-dup.ll
…
tail-merge-branch-weight.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
tail-opts.ll
…
tailcall-mem-intrinsics.ll
…
taildup-branch-weight.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
test-sharedidx.ll
…
this-return.ll
…
thread_pointer.ll
…
thumb1_return_sequence.ll
[ARM] Fix an off-by-one error when restoring LR for 16-bit Thumb
2017-11-27 10:13:14 +00:00
thumb1-div.ll
…
thumb1-ldst-opt.ll
…
thumb1-varalloc.ll
…
thumb2-it-block.ll
…
thumb2-size-opt.ll
…
thumb2-size-reduction-internal-flags.ll
…
thumb_indirect_calls.ll
…
thumb-alignment.ll
…
thumb-big-stack.ll
…
thumb-litpool.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
thumb-stub.ll
…
tls1.ll
…
tls2.ll
…
tls3.ll
…
tls-models.ll
…
trap.ll
…
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
twoaddrinstr.ll
…
uint64tof64.ll
…
umulo-32.ll
…
unaligned_load_store_vector.ll
…
unaligned_load_store_vfp.ll
…
unaligned_load_store.ll
…
undef-sext.ll
…
undefined.ll
…
unfold-shifts.ll
…
unord.ll
…
unsafe-fsub.ll
…
unschedule-first-call.ll
…
unwind-init.ll
…
urem-opt-size.ll
…
usat-lower.ll
…
usat-upper.ll
…
usat-v4t.ll
…
usat.ll
[ARM] Lower unsigned saturation to USAT
2017-12-20 11:13:57 +00:00
uxt_rot.ll
…
uxtb.ll
…
v1-constant-fold.ll
…
v6-jumptable-clobber.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
v6m-smul-with-overflow.ll
…
v6m-umul-with-overflow.ll
…
v7k-abi-align.ll
…
v7k-libcalls.ll
…
v7k-sincos.ll
…
v8m-tail-call.ll
Fix function pointer tail calls in armv8-M.base
2017-12-04 16:55:49 +00:00
v8m.base-jumptable_alignment.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
va_arg.ll
…
vaba.ll
…
vabd.ll
…
vabs.ll
…
vadd.ll
…
vararg_no_start.ll
…
varargs-spill-stack-align-nacl.ll
…
vargs_align.ll
…
vargs.ll
…
vbits.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vbsl-constant.ll
…
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
…
vcmp-crash.ll
…
vcnt.ll
…
vcombine.ll
…
vcvt_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vcvt-cost.ll
…
vcvt-v8.ll
…
vcvt.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vdiv_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vdup.ll
…
vector-DAGCombine.ll
…
vector-extend-narrow.ll
…
vector-load.ll
…
vector-promotion.ll
…
vector-spilling.ll
…
vector-store.ll
…
vext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vfcmp.ll
…
vfloatintrinsics.ll
…
vfp-libcalls.ll
…
vfp-reg-stride.ll
…
vfp-regs-dwarf.ll
…
vfp.ll
…
vget_lane.ll
…
vhadd.ll
…
vhsub.ll
…
vicmp-64.ll
…
vicmp.ll
…
virtregrewriter-subregliveness.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vld1.ll
…
vld2.ll
…
vld3.ll
…
vld4.ll
…
vld-vst-upgrade.ll
…
vlddup.ll
…
vldlane.ll
…
vldm-liveness.ll
…
vldm-liveness.mir
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
vldm-sched-a9.ll
…
vminmax.ll
…
vminmaxnm-safe.ll
…
vminmaxnm.ll
…
vmla.ll
…
vmls.ll
…
vmov.ll
…
vmul.ll
…
vneg.ll
…
vpadal.ll
…
vpadd.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vpminmax.ll
…
vqadd.ll
…
vqdmul.ll
…
vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
…
vsel.ll
…
vselect_imax.ll
…
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
…
vshrn.ll
…
vsra.ll
…
vst1.ll
…
vst2.ll
…
vst3.ll
…
vst4.ll
…
vstlane.ll
…
vsub.ll
…
vtbl.ll
…
vtrn.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vuzp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vzip.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
warn-stack.ll
…
weak2.ll
…
weak.ll
…
wide-compares.ll
…
widen-vmovs.ll
…
wrong-t2stmia-size-opt.ll
…
xray-armv6-attribute-instrumentation.ll
…
xray-armv7-attribute-instrumentation.ll
…
xray-tail-call-sled.ll
…
zero-cycle-zero.ll
…
zextload_demandedbits.ll
…