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clang-p2996/llvm/test/CodeGen/Hexagon
History
Krzysztof Parzyszek 240df6faa4 [Hexagon] Fix building 64-bit vector from constant values 
The constants were aggregated in a reverse order.

llvm-svn: 322303
2018-01-11 18:30:41 +00:00
..
autohvx
[Hexagon] Cast elements to correct type when creating constant vector
2018-01-11 18:03:23 +00:00
intrinsics
[Hexagon] Fix operand-swapping PatFrag for atomic stores
2017-12-15 20:13:57 +00:00
loop-idiom
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vect
[Hexagon] Fix building 64-bit vector from constant values
2018-01-11 18:30:41 +00:00
absaddr-store.ll
…
absimm.ll
…
addaddi.ll
[Hexagon] Add extra pattern for S4_addaddi
2017-10-23 19:07:50 +00:00
adde.ll
…
addh-sext-trunc.ll
…
addh-shifted.ll
…
addh.ll
…
addr-calc-opt.ll
…
addrmode-globoff.mir
…
addrmode-indoff.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
addrmode-keepdeadphis.mir
[Hexagon] Keep all phi nodes when building DFG in addr-mode-opt
2017-06-29 15:55:59 +00:00
addrmode-rr-to-io.mir
[Hexagon] Fix store conversion from rr to io in optimize addressing modes
2017-10-19 16:59:22 +00:00
adjust-latency-stackST.ll
…
alu64.ll
…
always-ext.ll
…
anti-dep-partial.mir
…
args.ll
…
ashift-left-right.ll
…
Atomics.ll
…
avoid-predspill-calleesaved.ll
…
avoid-predspill.ll
…
bank-conflict-load.mir
[Hexagon] Check for potential bank conflicts in post-RA scheduling
2017-08-28 18:36:21 +00:00
barrier-flag.ll
…
base-offset-addr.ll
…
base-offset-post.ll
…
bit-bitsplit-at.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-bitsplit-src.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-bitsplit.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-eval.ll
…
bit-ext-sat.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-extract-off.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-extract.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-extractu-half.ll
…
bit-gen-rseq.ll
…
bit-has.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-loop-rc-mismatch.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-loop.ll
…
bit-phi.ll
…
bit-rie.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bit-skip-byval.ll
…
bit-validate-reg.ll
…
bit-visit-flowq.ll
…
bitconvert-vector.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
bitmanip.ll
…
block-addr.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
block-ranges-nodef.ll
…
branch-folder-hoist-kills.mir
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
branch-non-mbb.ll
…
branchfolder-insert-impdef.mir
Insert IMPLICIT_DEFS for undef uses in tail merging
2017-09-06 20:45:24 +00:00
branchfolder-keep-impdef.ll
…
BranchPredict.ll
…
brev_ld.ll
…
brev_st.ll
…
bugAsmHWloop.ll
…
build-vector-shuffle.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
build-vector-v4i8-zext.ll
[Hexagon] Make sure to zero-extend bytes before building a vector
2017-11-28 19:13:17 +00:00
builtin-expect.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
builtin-prefetch-offset.ll
…
builtin-prefetch.ll
…
call-ret-i1.ll
[Hexagon] Return the correct chain edge for i1 function calls
2017-10-23 19:35:25 +00:00
calling-conv-2.ll
…
callr-dep-edge.ll
…
cext-check.ll
…
cext-opt-basic.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
cext-opt-numops.mir
[Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp
2017-10-27 18:52:28 +00:00
cext-opt-range-offset.mir
[Hexagon] Account for negative offset when limiting max deviation
2017-10-25 18:46:40 +00:00
cext-valid-packet1.ll
…
cext-valid-packet2.ll
…
cext.ll
…
cexti16.ll
…
cfgopt-fall-through.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
cfi-late.ll
…
cfi-offset.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
checktabs.ll
…
circ_ld.ll
…
circ_ldd_bug.ll
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
2017-11-30 12:12:19 +00:00
circ_ldw.ll
…
circ_st.ll
…
circ-load-isel.ll
…
clr_set_toggle.ll
…
cmp_pred2.ll
…
cmp_pred_reg.ll
…
cmp_pred.ll
…
cmp-extend.ll
…
cmp-promote.ll
…
cmp-to-genreg.ll
…
cmp-to-predreg.ll
…
cmp.ll
…
cmpb_pred.ll
…
cmpb-dec-imm.ll
[Hexagon] Add patterns for cmpb/cmph with immediate arguments
2017-10-13 15:43:12 +00:00
cmpb-eq.ll
…
cmph-gtu.ll
[Hexagon] Add patterns for cmpb/cmph with immediate arguments
2017-10-13 15:43:12 +00:00
combine_ir.ll
…
combine.ll
…
common-gep-basic.ll
…
common-gep-icm.ll
…
common-gep-inbounds.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
compound.ll
…
const64.ll
…
const-pool-tf.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
constp-clb.ll
…
constp-combine-neg.ll
[Hexagon] Implement buildVector32 and buildVector64 as utility functions
2017-11-22 20:56:23 +00:00
constp-ctb.ll
…
constp-extract.ll
…
constp-physreg.ll
…
constp-rewrite-branches.ll
…
constp-rseq.ll
…
constp-vsplat.ll
…
convert_const_i1_to_i8.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
convert-to-dot-old.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
convertdptoint.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
convertdptoll.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
convertsptoint.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
convertsptoll.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
copy-to-combine-dbg.ll
…
csr-func-usedef.ll
…
ctor.ll
…
dadd.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
dead-store-stack.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
dmul.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
double.ll
…
doubleconvert-ieee-rnd-near.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
dsub.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
dualstore.ll
…
duplex-addi-global-imm.mir
[Hexagon] Fix typo in a testcase
2017-06-22 16:25:46 +00:00
duplex.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
early-if-conversion-bug1.ll
…
early-if-debug.mir
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
early-if-merge-loop.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
early-if-phi-i1.ll
…
early-if-spare.ll
…
early-if-vecpi.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
early-if-vecpred.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
early-if.ll
…
eh_return.ll
…
eliminate-pred-spill.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
expand-condsets-basic.ll
…
expand-condsets-dead-bad.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
expand-condsets-dead-pred.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
expand-condsets-def-undef.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
expand-condsets-extend.ll
…
expand-condsets-imm.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
expand-condsets-impuse.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
expand-condsets-pred-undef.ll
…
expand-condsets-rm-reg.mir
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
2017-11-30 12:12:19 +00:00
expand-condsets-rm-segment.ll
…
expand-condsets-same-inputs.mir
…
expand-condsets-undef2.ll
…
expand-condsets-undef.ll
…
expand-condsets-undefvni.ll
Missed a check for UndefVI in r306466
2017-06-28 15:46:16 +00:00
expand-vselect-kill.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
expand-vstorerw-undef2.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
expand-vstorerw-undef.ll
[Hexagon] Allow construction of HVX vector predicates
2017-12-20 20:49:43 +00:00
extload-combine.ll
…
extract-basic.ll
…
fadd.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
fcmp.ll
…
find-loop-instr.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
fixed-spill-mutable.ll
…
float-amode.ll
…
float.ll
…
floatconvert-ieee-rnd-near.ll
…
fminmax.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
fmul.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
fpelim-basic.ll
[Hexagon] Implement frame pointer elimination with -fomit-frame-pointer
2017-06-30 21:21:40 +00:00
frame-offset-overflow.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
fsel.ll
…
fsub.ll
[Hexagon] Preclude non-memory test from being optimized away. NFC.
2017-07-05 13:08:03 +00:00
fusedandshift.ll
…
gp-plus-offset-load.ll
…
gp-plus-offset-store.ll
…
gp-rel.ll
…
hasfp-crash1.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hasfp-crash2.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hexagon_vector_loop_carried_reuse_constant.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hexagon_vector_loop_carried_reuse.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hvx-nontemporal.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hwloop1.ll
…
hwloop2.ll
…
hwloop3.ll
…
hwloop4.ll
…
hwloop5.ll
…
hwloop-cleanup.ll
…
hwloop-const.ll
…
hwloop-crit-edge.ll
…
hwloop-dbg.ll
…
hwloop-le.ll
…
hwloop-loop1.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
hwloop-lt1.ll
…
hwloop-lt.ll
…
hwloop-missed.ll
…
hwloop-ne.ll
…
hwloop-noreturn-call.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hwloop-ph-deadcode.ll
…
hwloop-pos-ivbump1.ll
…
hwloop-preh.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
hwloop-preheader.ll
…
hwloop-range.ll
…
hwloop-recursion.ll
…
hwloop-redef-imm.mir
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
hwloop-wrap2.ll
…
hwloop-wrap.ll
…
i1_VarArg.ll
…
i8_VarArg.ll
…
i16_VarArg.ll
…
idxload-with-zero-offset.ll
…
ifcvt-common-kill.mir
[IfConversion] Remove kill flags from common instructions as well
2017-09-06 17:57:13 +00:00
ifcvt-diamond-bad.ll
…
ifcvt-diamond-bug-2016-08-26.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
ifcvt-edge-weight.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
ifcvt-impuse-livein.mir
[IfConversion] More simple, correct dead/kill liveness handling
2017-09-14 15:53:11 +00:00
ifcvt-live-subreg.mir
[IfConversion] More simple, correct dead/kill liveness handling
2017-09-14 15:53:11 +00:00
ifcvt-simple-bprob.ll
…
indirect-br.ll
…
inline-asm-a.ll
[Hexagon] Add inline-asm constraint 'a' for modifier register class
2017-07-21 17:51:27 +00:00
inline-asm-bad-constraint.ll
[Hexagon] Report error instead of crashing on wrong inline-asm constraints
2017-10-20 20:24:44 +00:00
inline-asm-hexagon.ll
…
inline-asm-i1.ll
…
inline-asm-qv.ll
[Hexagon] Remove trailing spaces, NFC
2017-11-22 20:43:00 +00:00
inline-asm-vecpred128.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
insert4.ll
…
insert-basic.ll
…
invalid-dotnew-attempt.mir
…
is-legal-void.ll
…
isel-combine-half.ll
[Hexagon] Add patterns to select A2_combine_ll and its variants
2017-11-22 20:55:41 +00:00
isel-exti1.ll
…
isel-i1arg-crash.ll
…
isel-op-zext-i1.ll
…
isel-prefer.ll
[Hexagon] Add patterns to select A2_combine_ll and its variants
2017-11-22 20:55:41 +00:00
isel-simplify-crash.ll
[Hexagon] Add a bitcast to required type in LowerHvxMul
2018-01-05 20:45:34 +00:00
jt-in-text.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
lit.local.cfg
…
livephysregs-add-pristines.mir
[IfConversion] More simple, correct dead/kill liveness handling
2017-09-14 15:53:11 +00:00
livephysregs-lane-masks2.mir
Insert IMPLICIT_DEFS for undef uses in tail merging
2017-09-06 20:45:24 +00:00
livephysregs-lane-masks.mir
[Hexagon] Add support for Hexagon V65
2017-12-11 18:57:54 +00:00
loadi1-G0.ll
…
loadi1-v4-G0.ll
…
loadi1-v4.ll
…
loadi1.ll
…
long-calls.ll
…
loop-prefetch.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
lower-extract-subvector.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
macint.ll
…
maxd.ll
…
maxh.ll
…
maxud.ll
…
maxuw.ll
…
maxw.ll
…
mem-fi-add.ll
…
memcpy-likely-aligned.ll
…
memops1.ll
…
memops2.ll
…
memops3.ll
…
memops-stack.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
memops.ll
…
mind.ll
…
minu-zext-8.ll
…
minu-zext-16.ll
…
minud.ll
…
minuw.ll
…
minw.ll
…
misaligned_double_vector_store_not_fast.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
misaligned-access.ll
…
misched-top-rptracker-sync.ll
…
mpy.ll
…
mul64-sext.ll
…
mulh.ll
[Hexagon] Remove trailing spaces, NFC
2017-11-22 20:43:00 +00:00
mulhs.ll
…
multi-cycle.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
mux-basic.ll
…
mux-kill1.mir
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
2017-06-22 20:43:02 +00:00
mux-kill2.mir
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
2017-06-22 20:43:02 +00:00
mux-kill3.mir
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
2017-06-22 20:43:02 +00:00
mux-undef.ll
…
newify-crash.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
newvaluejump2.ll
[Hexagon] Remove trailing spaces, NFC
2017-11-22 20:43:00 +00:00
newvaluejump3.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
newvaluejump-c4.mir
[Hexagon] Recognize C4_cmpneqi, C4_cmpltei and C4_cmplteui in NewValueJump
2017-07-24 19:35:48 +00:00
newvaluejump-kill2.mir
[Hexagon] Update kills in hexagon-nvj even more properly than before
2017-06-27 18:37:16 +00:00
newvaluejump-kill.ll
[Hexagon] Properly update kill flags in HexagonNewValueJump
2017-06-22 21:11:44 +00:00
newvaluejump-solo.mir
[Hexagon] Fix wrong check in test/CodeGen/Hexagon/newvaluejump-solo.mir
2017-11-30 21:23:19 +00:00
newvaluejump.ll
…
newvalueSameReg.ll
…
newvaluestore.ll
…
NVJumpCmp.ll
…
opt-addr-mode.ll
…
opt-fabs.ll
…
opt-fneg.ll
…
opt-spill-volatile.ll
…
packetize_cond_inst.ll
…
packetize-cfi-location.ll
…
packetize-load-store-aliasing.mir
[Packetizer] Add function to check for aliasing between instructions
2017-10-20 22:08:40 +00:00
packetize-nvj-no-prune.mir
[Hexagon] Make sure that new-value jump is packetized with producer
2017-10-11 21:20:43 +00:00
packetize-return-arg.ll
…
packetize-tailcall-arg.ll
…
peephole-kill-flags.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
peephole-op-swap.ll
…
pic-jumptables.ll
…
pic-local.ll
…
pic-regusage.ll
…
pic-simple.ll
…
pic-static.ll
…
plt-rel.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
post-inc-aa-metadata.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
post-ra-kill-update.mir
…
postinc-baseoffset.mir
[Hexagon] Fix a bug in r308502: post-inc offset is always 0
2017-07-19 19:17:32 +00:00
postinc-load.ll
…
postinc-offset.ll
…
postinc-store.ll
…
PR33749.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
pred-absolute-store.ll
…
pred-gp.ll
…
pred-instrs.ll
…
predicate-copy.ll
…
predicate-logical.ll
…
predicate-rcmp.ll
…
propagate-vcombine.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
rdf-copy-undef2.ll
…
rdf-copy.ll
[Hexagon] Remove trailing spaces, NFC
2017-11-22 20:43:00 +00:00
rdf-cover-use.ll
…
rdf-dead-loop.ll
…
rdf-def-mask.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
rdf-ehlabel-live.mir
[Hexagon] Make sure that RDF does not remove EH_LABELs
2017-11-21 21:05:51 +00:00
rdf-extra-livein.ll
…
rdf-filter-defs.ll
…
rdf-ignore-undef.ll
…
rdf-inline-asm-fixed.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
rdf-inline-asm.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
rdf-multiple-phis-up.ll
…
rdf-phi-shadows.ll
…
rdf-phi-up.ll
…
rdf-reset-kills.ll
…
readcyclecounter.ll
…
reg-scavengebug-3.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
reg-scavenger-valid-slot.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
regalloc-bad-undef.mir
[MachineOperand][MIR] Add isRenamable to MachineOperand.
2017-12-12 17:53:59 +00:00
regalloc-block-overlap.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
regalloc-liveout-undef.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
relax.ll
…
remove_lsr.ll
…
remove-endloop.ll
…
restore-single-reg.ll
…
ret-struct-by-val.ll
…
runtime-stkchk.ll
…
sdata-array.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
sdata-basic.ll
…
sdr-basic.ll
…
sdr-shr32.ll
…
section_7275.ll
…
select-instr-align.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
sf-min-max.ll
…
sffms.ll
…
shrink-frame-basic.ll
…
signed_immediates.ll
…
simple_addend.ll
…
simpletailcall.ll
…
split-const32-const64.ll
[Hexagon] Remove trailing spaces, NFC
2017-11-22 20:43:00 +00:00
stack-align1.ll
…
stack-align2.ll
…
stack-align-reset.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
stack-alloca1.ll
…
stack-alloca2.ll
…
static.ll
…
store-imm-amode.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
store-imm-large-stack.ll
[Hexagon] Recognize potential offset overflow for store-imm to stack
2017-06-22 14:11:23 +00:00
store-imm-stack-object.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
store-shift.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
store-widen-aliased-load.ll
…
store-widen-negv2.ll
…
store-widen-negv.ll
…
store-widen.ll
…
storerd-io-over-rr.ll
…
storerinewabs.ll
…
struct_args_large.ll
…
struct_args.ll
…
sube.ll
…
subi-asl.ll
…
SUnit-boundary-prob.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
switch-lut-explicit-section.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
switch-lut-function-section.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
switch-lut-multiple-functions.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
switch-lut-text-section.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
swp-const-tc.ll
[LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()
2017-08-09 11:28:01 +00:00
swp-dag-phi.ll
…
swp-epilog-phi10.ll
…
swp-epilog-reuse-1.ll
…
swp-epilog-reuse.ll
…
swp-matmul-bitext.ll
…
swp-max.ll
…
swp-multi-loops.ll
…
swp-order-copies.ll
[Pipeliner] Improve serialization order for post-increments
2017-10-11 15:51:44 +00:00
swp-prolog-phi4.ll
…
swp-stages4.ll
[Hexagon] Adjust patterns to reflect instruction selection preferences
2017-10-27 22:24:49 +00:00
swp-stages5.ll
…
swp-vect-dotprod.ll
…
swp-vmult.ll
…
swp-vsum.ll
…
tail-call-mem-intrinsics.ll
…
tail-call-trunc.ll
…
tail-dup-subreg-abort.ll
…
tail-dup-subreg-map.ll
…
tailcall_fastcc_ccc.ll
…
target-flag-ext.mir
[Hexagon] Fix check for HMOTF_ConstExtend operand flag
2017-07-10 18:38:52 +00:00
tfr-to-combine.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
tls_pic.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
tls_static.ll
[Hexagon] Reorganize and update instruction patterns
2017-10-20 19:33:12 +00:00
trap-unreachable.ll
[Hexagon] Add option to generate calls to "abort" for "unreachable"
2017-09-06 16:22:55 +00:00
two-crash.ll
…
undo-dag-shift.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
union-1.ll
…
unreachable-mbb-phi-subreg.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
usr-ovf-dep.ll
…
v6vec-vprint.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
v60-cur.ll
[Hexagon] Allow construction of HVX vector predicates
2017-12-20 20:49:43 +00:00
v60-vsel1.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
v60Intrins.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
v60small.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
v60Vasr.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vaddh.ll
…
validate-offset.ll
…
vassign-to-combine.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vdmpy-halide-test.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vec-pred-spill1.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vec-vararg-align.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vector-align.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vector-ext-load.ll
…
vload-postinc-sel.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vmpa-halide-test.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vpack_eo.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vselect-pseudo.ll
[Hexagon] New HVX target features.
2017-10-18 18:07:07 +00:00
vsplat-isel.ll
…
zextloadi1.ll
[Hexagon] Minimize number of repeated constant extenders
2017-10-13 19:02:59 +00:00